forked from len0rd/rockbox
addb5228ec
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16308 a1c6a512-1295-4272-9138-f99709370657
698 lines
18 KiB
C
698 lines
18 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 Rob Purchase
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "ata.h"
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#include "ata-target.h"
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#include "ata_idle_notify.h"
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#include "system.h"
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#include <string.h>
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#include "thread.h"
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#include "led.h"
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#include "disk.h"
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#include "panic.h"
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#include "usb.h"
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/* for compatibility */
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int ata_spinup_time = 0;
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long last_disk_activity = -1;
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/** static, private data **/
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static bool initialized = false;
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static long next_yield = 0;
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#define MIN_YIELD_PERIOD 2000
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static struct mutex ata_mtx NOCACHEBSS_ATTR;
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#define SECTOR_SIZE 512
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/* TCC780x NAND Flash Controller */
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#define NFC_CMD (*(volatile unsigned long *)0xF0053000)
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#define NFC_SADDR (*(volatile unsigned long *)0xF005300C)
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#define NFC_SDATA (*(volatile unsigned long *)0xF0053040)
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#define NFC_WDATA (*(volatile unsigned long *)0xF0053010)
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#define NFC_CTRL (*(volatile unsigned long *)0xF0053050)
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#define NFC_IREQ (*(volatile unsigned long *)0xF0053060)
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#define NFC_RST (*(volatile unsigned long *)0xF0053064)
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/* NFC_CTRL flags */
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#define NFC_16BIT (1<<26)
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#define NFC_CS0 (1<<23)
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#define NFC_CS1 (1<<22)
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#define NFC_READY (1<<20)
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/* Chip characteristics, initialised by nand_get_chip_info() */
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static int page_size = 0;
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static int spare_size = 0;
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static int pages_per_block = 0;
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static int blocks_per_bank = 0;
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static int pages_per_bank = 0;
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static int row_cycles = 0;
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static int col_cycles = 0;
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static int total_banks = 0;
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static int sectors_per_page = 0;
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static int bytes_per_segment = 0;
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static int sectors_per_segment = 0;
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/* Maximum values for static buffers */
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#define MAX_PAGE_SIZE 4096
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#define MAX_SPARE_SIZE 128
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#define MAX_BLOCKS_PER_BANK 8192
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#define MAX_BANKS 4
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/*
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Block translation table - maps logical Segment Number to physical page address
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Format: 0xBTPPPPPP (B = Bank; T = Block Type flag; P = Page Address)
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*/
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static int segment_location[MAX_BLOCKS_PER_BANK * MAX_BANKS / 4];
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static void nand_chip_select(int chip)
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{
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if (chip == -1)
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{
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/* Disable both chip selects */
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GPIOB_CLEAR = (1<<21);
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NFC_CTRL |= NFC_CS0 | NFC_CS1;
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}
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else
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{
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/* NFC chip select */
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if (chip & 1)
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{
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NFC_CTRL &= ~NFC_CS0;
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NFC_CTRL |= NFC_CS1;
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}
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else
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{
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NFC_CTRL |= NFC_CS0;
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NFC_CTRL &= ~NFC_CS1;
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}
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/* Secondary chip select */
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if (chip & 2)
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{
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GPIOB_SET = (1<<21);
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}
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else
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{
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GPIOB_CLEAR = (1<<21);
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}
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}
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}
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static void nand_read_id(int chip, unsigned char* id_buf)
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{
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/* Enable NFC bus clock */
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BCLKCTR |= DEV_NAND;
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/* Reset NAND controller */
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NFC_RST = 0;
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/* Set slow cycle timings since the chip is as yet unidentified */
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NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x353;
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nand_chip_select(chip);
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/* Set write protect */
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GPIOB_CLEAR = (1<<19);
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/* Reset command */
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NFC_CMD = 0xFF;
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/* Set 8-bit data width */
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NFC_CTRL &= ~NFC_16BIT;
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/* Read ID command, single address cycle */
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NFC_CMD = 0x90;
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NFC_SADDR = 0x00;
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/* Read the 5 single bytes */
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id_buf[0] = NFC_SDATA & 0xFF;
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id_buf[1] = NFC_SDATA & 0xFF;
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id_buf[2] = NFC_SDATA & 0xFF;
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id_buf[3] = NFC_SDATA & 0xFF;
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id_buf[4] = NFC_SDATA & 0xFF;
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nand_chip_select(-1);
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/* Disable NFC bus clock */
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BCLKCTR &= ~DEV_NAND;
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}
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static void nand_read_uid(int chip, unsigned int* uid_buf)
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{
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int i;
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/* Enable NFC bus clock */
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BCLKCTR |= DEV_NAND;
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/* Set cycle timing (stp = 1, pw = 3, hold = 1) */
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NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
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nand_chip_select(chip);
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/* Set write protect */
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GPIOB_CLEAR = 1<<19;
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/* Set 8-bit data width */
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NFC_CTRL &= ~NFC_16BIT;
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/* Undocumented (SAMSUNG specific?) commands set the chip into a
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special mode allowing a normally-hidden UID block to be read. */
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NFC_CMD = 0x30;
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NFC_CMD = 0x65;
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/* Read command */
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NFC_CMD = 0x00;
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/* Write row/column address */
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for (i = 0; i < col_cycles; i++) NFC_SADDR = 0;
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for (i = 0; i < row_cycles; i++) NFC_SADDR = 0;
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/* End of read */
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NFC_CMD = 0x30;
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/* Wait until complete */
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while (!(NFC_CTRL & NFC_READY)) {};
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/* Copy data to buffer (data repeats after 8 words) */
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for (i = 0; i < 8; i++)
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{
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uid_buf[i] = NFC_WDATA;
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}
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/* Reset the chip back to normal mode */
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NFC_CMD = 0xFF;
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nand_chip_select(-1);
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/* Disable NFC bus clock */
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BCLKCTR &= ~DEV_NAND;
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}
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/* NB: size must be divisible by 4 due to 32-bit read */
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static void nand_read_raw(int chip, int row, int column, int size, void* buf)
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{
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int i;
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/* Currently this relies on a word-aligned input buffer */
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unsigned int* int_buf = (unsigned int*)buf;
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if ((unsigned int)buf & 3) panicf("nand_read_raw() non-aligned input buffer");
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/* Enable NFC bus clock */
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BCLKCTR |= DEV_NAND;
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/* Set cycle timing (stp = 1, pw = 3, hold = 1) */
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NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
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nand_chip_select(chip);
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/* Set write protect */
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GPIOB_CLEAR = (1<<19);
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/* Set 8-bit data width */
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NFC_CTRL &= ~NFC_16BIT;
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/* Read command */
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NFC_CMD = 0x00;
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/* Write column address */
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for (i = 0; i < col_cycles; i++)
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{
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NFC_SADDR = column & 0xFF;
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column = column >> 8;
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}
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/* Write row address */
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for (i = 0; i < row_cycles; i++)
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{
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NFC_SADDR = row & 0xFF;
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row = row >> 8;
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}
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/* End of read command */
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NFC_CMD = 0x30;
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/* Wait until complete */
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while (!(NFC_CTRL & NFC_READY)) {};
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/* Read data into page buffer */
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for (i = 0; i < (size/4); i++)
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{
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int_buf[i] = NFC_WDATA;
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}
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nand_chip_select(-1);
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/* Disable NFC bus clock */
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BCLKCTR &= ~DEV_NAND;
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}
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/* NB: Output buffer must currently be word-aligned */
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static bool nand_read_sector(int segment, int sector, void* buf)
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{
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int physaddr = segment_location[segment];
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int bank = physaddr >> 28;
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int page = physaddr & 0xffffff;
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int page_in_seg = sector / sectors_per_page;
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int sec_in_page = sector % sectors_per_page;
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/* TODO: Check if there are any 0x15 pages referring to this segment/sector
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combination. If present we need to read that data instead. */
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if (physaddr == -1) return false;
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if (page_in_seg & 1)
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{
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/* Data is located in block+1 */
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page += pages_per_block;
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}
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if (page_in_seg & 2)
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{
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/* Data is located in second plane */
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page += (blocks_per_bank/2) * pages_per_block;
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}
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page += page_in_seg/4;
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nand_read_raw(bank, page,
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sec_in_page * (SECTOR_SIZE+16),
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SECTOR_SIZE, buf);
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/* TODO: Read the 16 spare bytes, perform ECC correction */
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return true;
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}
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static void nand_get_chip_info(void)
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{
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bool found = false;
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unsigned char manuf_id;
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unsigned char id_buf[8];
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/* Read chip id from bank 0 */
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nand_read_id(0, id_buf);
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manuf_id = id_buf[0];
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switch (manuf_id)
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{
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case 0xEC: /* SAMSUNG */
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switch(id_buf[1]) /* Chip Id */
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{
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case 0xD5: /* K9LAG08UOM */
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page_size = 2048;
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spare_size = 64;
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pages_per_block = 128;
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blocks_per_bank = 8192;
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col_cycles = 2;
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row_cycles = 3;
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found = true;
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break;
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case 0xD7: /* K9LBG08UOM */
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page_size = 4096;
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spare_size = 128;
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pages_per_block = 128;
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blocks_per_bank = 8192;
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col_cycles = 2;
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row_cycles = 3;
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found = true;
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break;
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}
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break;
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}
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if (!found)
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{
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panicf("Unknown NAND: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x",
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id_buf[0],id_buf[1],id_buf[2],id_buf[3],id_buf[4]);
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}
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pages_per_bank = blocks_per_bank * pages_per_block;
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bytes_per_segment = page_size * pages_per_block * 4;
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sectors_per_page = page_size / SECTOR_SIZE;
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sectors_per_segment = bytes_per_segment / SECTOR_SIZE;
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/* Establish how many banks are present */
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nand_read_id(1, id_buf);
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if (id_buf[0] == manuf_id)
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{
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/* Bank 1 is populated, now check if banks 2/3 are valid */
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nand_read_id(2, id_buf);
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if (id_buf[0] == manuf_id)
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{
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/* Bank 2 returned matching id - check if 2/3 are shadowing 0/1 */
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unsigned int uid_buf0[8];
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unsigned int uid_buf2[8];
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nand_read_uid(0, uid_buf0);
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nand_read_uid(2, uid_buf2);
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if (memcmp(uid_buf0, uid_buf2, 32) == 0)
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{
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/* UIDs match, assume banks 2/3 are shadowing 0/1 */
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total_banks = 2;
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}
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else
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{
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/* UIDs differ, assume banks 2/3 are valid */
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total_banks = 4;
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}
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}
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else
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{
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/* Bank 2 returned differing id - assume 2/3 are junk */
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total_banks = 2;
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}
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}
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else
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{
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/* Bank 1 returned differing id - assume it is junk */
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total_banks = 1;
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}
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/* Check block 0, page 0 for "BMPM" string & total_banks byte. If this is
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confirmed for all D2s we can remove the above code & nand_read_uid(). */
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nand_read_raw(0, /* bank */
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0, /* page */
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page_size, /* offset */
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8, id_buf);
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if (strncmp(id_buf, "BMPM", 4)) panicf("BMPM tag not present");
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if (id_buf[4] != total_banks) panicf("BMPM total_banks mismatch");
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}
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/* TEMP testing function */
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#ifdef BOOTLOADER
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#include "lcd.h"
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extern int line;
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unsigned int buf[(MAX_PAGE_SIZE + MAX_SPARE_SIZE) / 4];
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static void nand_test(void)
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{
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int i;
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unsigned int seq_segments = 0;
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#if 0
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int chip,page;
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#endif
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printf("%d banks", total_banks);
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printf("* %d pages", pages_per_bank);
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printf("* %d bytes per page", page_size);
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i = 0;
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while (segment_location[i] != -1
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&& i++ < (blocks_per_bank * total_banks / 4))
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{
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seq_segments++;
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}
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printf("%d sequential segments found (%dMb)", seq_segments,
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(seq_segments*bytes_per_segment)>>20);
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while (!button_read_device()) {};
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while (button_read_device()) {};
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#if 0
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/* Read & display sequential pages */
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for (chip = 0; chip < total_banks; chip++)
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{
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for (page = 0x0; page < 0x100; page++)
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{
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nand_read_raw(chip, page, 0, page_size+spare_size, buf);
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for (i = 0; i < (page_size+spare_size)/4; i += 132)
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{
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int j,interesting = 0;
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line = 0;
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printf("c:%d p:%lx i:%d", chip, page, i);
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for (j=i; j<(i+131); j++)
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{
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if (buf[j] != 0xffffffff) interesting = 1;
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}
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if (interesting)
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{
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for (j=i; j<(i+63); j+=4)
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{
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printf("%lx %lx %lx %lx",
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buf[j], buf[j+1], buf[j+2], buf[j+3]);
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}
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printf("--->");
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while (!button_read_device()) {};
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while (button_read_device()) {};
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line = 1;
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printf("<---");
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for (j=j; j<(i+131); j+=4)
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{
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printf("%lx %lx %lx %lx",
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buf[j], buf[j+1], buf[j+2], buf[j+3]);
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}
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while (!button_read_device()) {};
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while (button_read_device()) {};
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reset_screen();
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}
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}
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}
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}
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#endif
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}
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#endif
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/* API Functions */
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void ata_led(bool onoff)
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{
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led(onoff);
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}
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int ata_read_sectors(IF_MV2(int drive,) unsigned long start, int incount,
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void* inbuf)
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{
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#ifdef HAVE_MULTIVOLUME
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(void)drive; /* unused for now */
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#endif
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mutex_lock(&ata_mtx);
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while (incount > 0)
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{
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int done = 0;
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int segment = start / sectors_per_segment;
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int secmod = start % sectors_per_segment;
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while (incount > 0 && secmod < sectors_per_segment)
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{
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if (!nand_read_sector(segment, secmod, inbuf))
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{
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mutex_unlock(&ata_mtx);
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return -1;
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}
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inbuf += SECTOR_SIZE;
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incount--;
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secmod++;
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done++;
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}
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if (done < 0)
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{
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mutex_unlock(&ata_mtx);
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return -1;
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}
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start += done;
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}
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mutex_unlock(&ata_mtx);
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return 0;
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}
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int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
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const void* outbuf)
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{
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#warning function not implemented
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(void)start;
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(void)count;
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(void)outbuf;
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return 0;
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}
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void ata_spindown(int seconds)
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{
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/* null */
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(void)seconds;
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}
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bool ata_disk_is_active(void)
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{
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/* null */
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return 0;
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}
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void ata_sleep(void)
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{
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/* null */
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}
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void ata_spin(void)
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{
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/* null */
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}
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/* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
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int ata_hard_reset(void)
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{
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/* null */
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return 0;
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}
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int ata_soft_reset(void)
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{
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|
/* null */
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return 0;
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}
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|
|
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void ata_enable(bool on)
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{
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/* null - flash controller is enabled/disabled as needed. */
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(void)on;
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}
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|
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int ata_init(void)
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{
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int i, bank, page;
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unsigned int spare_buf[4];
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|
|
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if (initialized) return 0;
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|
|
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/* Get chip characteristics and number of banks */
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|
nand_get_chip_info();
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|
|
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for (i = 0; i < (MAX_BLOCKS_PER_BANK * MAX_BANKS / 4); i++)
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{
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|
segment_location[i] = -1;
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|
}
|
|
|
|
/* Scan banks to build up block translation table */
|
|
for (bank = 0; bank < total_banks; bank++)
|
|
{
|
|
for (page = 0; page < pages_per_bank/2; page += pages_per_block*2)
|
|
{
|
|
unsigned char segment_flag;
|
|
unsigned char stored_flag;
|
|
unsigned short segment_id;
|
|
|
|
unsigned char* buf_ptr = (unsigned char*)spare_buf;
|
|
|
|
/* Read spare bytes from first sector of each segment */
|
|
nand_read_raw(bank, page,
|
|
SECTOR_SIZE, /* offset */
|
|
16, spare_buf);
|
|
|
|
segment_id = (buf_ptr[6] << 8) | buf_ptr[7];
|
|
segment_flag = buf_ptr[4];
|
|
|
|
stored_flag = (segment_location[segment_id] >> 24) & 0xf;
|
|
|
|
#if defined(BOOTLOADER) && 0
|
|
if (segment_flag == 0x15)
|
|
{
|
|
printf("Segment %lx: c:%lx p:%lx, type:%lx, stored:x%lx",
|
|
segment_id, bank, page, segment_flag, stored_flag);
|
|
while (!button_read_device()) {};
|
|
while (button_read_device()) {};
|
|
}
|
|
#endif
|
|
|
|
if (segment_flag == 0x13 || segment_flag == 0x17)
|
|
{
|
|
if (segment_id < (blocks_per_bank * total_banks / 4))
|
|
{
|
|
#if defined(BOOTLOADER) && 0
|
|
if (segment_location[segment_id] != -1 && stored_flag != 0x3)
|
|
{
|
|
int orig_bank = segment_location[segment_id] >> 28;
|
|
int orig_page = segment_location[segment_id] & 0xFFFFFF;
|
|
|
|
printf("Segment %d already set! (stored flag:x%lx)",
|
|
segment_id, stored_flag);
|
|
|
|
printf("0x%08x 0x%08x 0x%08x 0x%08x",
|
|
spare_buf[0],spare_buf[1],spare_buf[2],spare_buf[3]);
|
|
|
|
nand_read_raw(orig_bank, orig_page,
|
|
SECTOR_SIZE,
|
|
16, spare_buf);
|
|
|
|
printf("0x%08x 0x%08x 0x%08x 0x%08x",
|
|
spare_buf[0],spare_buf[1],spare_buf[2],spare_buf[3]);
|
|
}
|
|
#endif
|
|
/* Write bank, block type & physical address into table */
|
|
segment_location[segment_id]
|
|
= page | (bank << 28) | ((segment_flag & 0xf) << 24);
|
|
}
|
|
else
|
|
{
|
|
panicf("Invalid segment id:%d found", segment_id);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
initialized = true;
|
|
|
|
#ifdef BOOTLOADER
|
|
/* TEMP - print out some diagnostics */
|
|
nand_test();
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
/* TEMP: This will return junk, it's here for compilation only */
|
|
unsigned short* ata_get_identify(void)
|
|
{
|
|
return (unsigned short*)0x21000000; /* Unused DRAM */
|
|
}
|