forked from len0rd/rockbox
Cortex-M processors don't have an MMU, but can still have caches that need software management, so on those platforms we don't want to include the MMU related functions. While here, remove an outdated section of a comment referring to deprecated cache maintenance functions which no longer exist. Change-Id: I6f0fe694560bdee25ed7c69a846bf46e3e544cb1
159 lines
4.2 KiB
C
159 lines
4.2 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 and 2009 by Karl Kurbjun
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <stdlib.h>
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#include "system.h"
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#include "kernel.h"
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#include "logf.h"
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#include "audio.h"
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#include "sound.h"
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#include "file.h"
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#include "dsp-target.h"
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#include "dsp/ipc.h"
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#include "pcm-internal.h"
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/* This is global to save some latency when pcm_play_dma_get_peak_buffer is
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* called.
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*/
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static const void *start;
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void pcm_play_dma_postinit(void)
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{
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/* Configure clock divider */
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tsc2100_writereg(CONTROL_PAGE2, TSPP1_ADDRESS, 0x1120);
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tsc2100_writereg(CONTROL_PAGE2, TSAC3_ADDRESS, 0x0800);
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tsc2100_writereg(CONTROL_PAGE2, TSCPC_ADDRESS, 0x3B00);
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tsc2100_writereg(CONTROL_PAGE2, TSAC1_ADDRESS, 0x0300);
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tsc2100_writereg(CONTROL_PAGE2, TSCSC_ADDRESS, 0xC580);
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audiohw_postinit();
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}
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void pcm_play_dma_init(void)
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{
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IO_INTC_IRQ0 = INTR_IRQ0_IMGBUF;
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bitset16(&IO_INTC_EINT0, INTR_EINT0_IMGBUF);
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/* Set this as a FIQ */
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bitset16(&IO_INTC_FISEL0, INTR_EINT0_IMGBUF);
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/* Enable the HPIB clock */
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bitset16(&IO_CLK_MOD0, (CLK_MOD0_HPIB | CLK_MOD0_DSP));
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IO_SDRAM_SDDMASEL = 0x24;
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IO_DSPC_HPIB_CONTROL = 1 << 10 | 1 << 9 | 1 << 8 | 1 << 7 | 1 << 3 | 1 << 0;
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dsp_reset();
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dsp_load(dsp_image);
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DSP_(_dma0_stopped)=1;
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dsp_wake();
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}
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void pcm_dma_apply_settings(void)
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{
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audiohw_set_frequency(pcm_fsel);
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}
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/* Note that size is actually limited to the size of a short right now due to
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* the implementation on the DSP side (and the way that we access it)
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*/
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void pcm_play_dma_start(const void *addr, size_t size)
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{
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unsigned long sdem_addr=(unsigned long)addr - CONFIG_SDRAM_START;
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/* Initialize codec. */
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DSP_(_sdem_addrl) = sdem_addr & 0xffff;
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DSP_(_sdem_addrh) = sdem_addr >> 16;
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DSP_(_sdem_dsp_size) = size;
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DSP_(_dma0_stopped)=0;
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dsp_wake();
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}
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void pcm_play_dma_stop(void)
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{
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DSP_(_dma0_stopped)=1;
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dsp_wake();
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}
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void pcm_play_lock(void)
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{
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}
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void pcm_play_unlock(void)
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{
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}
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/* Only used when debugging */
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static char buffer[80];
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void DSPHINT(void) __attribute__ ((section(".icode")));
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void DSPHINT(void)
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{
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unsigned int i;
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size_t size;
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IO_INTC_FIQ0 = INTR_IRQ0_IMGBUF;
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switch (dsp_message.msg)
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{
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case MSG_DEBUGF:
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/* DSP stores one character per word. */
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for (i = 0; i < sizeof(buffer); i++)
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{
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buffer[i] = dsp_message.payload.debugf.buffer[i];
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}
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DEBUGF("DSP: %s", buffer);
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break;
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case MSG_REFILL:
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/* Buffer empty. Try to get more. */
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if (pcm_play_dma_complete_callback(PCM_DMAST_OK, &start, &size))
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{
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unsigned long sdem_addr=(unsigned long)start - CONFIG_SDRAM_START;
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/* Flush any pending cache writes */
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commit_dcache_range(start, size);
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/* set the new DMA values */
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DSP_(_sdem_addrl) = sdem_addr & 0xffff;
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DSP_(_sdem_addrh) = sdem_addr >> 16;
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DSP_(_sdem_dsp_size) = size;
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DEBUGF("pcm_sdram at 0x%08lx, sdem_addr 0x%08lx",
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(unsigned long)start, (unsigned long)sdem_addr);
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pcm_play_dma_status_callback(PCM_DMAST_STARTED);
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}
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break;
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default:
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DEBUGF("DSP: unknown msg 0x%04x", dsp_message.msg);
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break;
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}
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/* Re-Activate the channel */
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dsp_wake();
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DEBUGF("DSP: %s", buffer);
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}
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