forked from len0rd/rockbox
388 lines
8.8 KiB
C
388 lines
8.8 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id: pmu-nano2g.c 27752 2010-08-08 10:49:32Z bertrik $
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*
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* Copyright © 2008 Rafaël Carré
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "kernel.h"
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#include "thread.h"
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#include "pmu-target.h"
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#include "adc-target.h"
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#include "i2c-s5l8702.h"
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#include "gpio-s5l8702.h"
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int pmu_read_multiple(int address, int count, unsigned char* buffer)
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{
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return i2c_read(0, 0xe6, address, count, buffer);
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}
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int pmu_write_multiple(int address, int count, unsigned char* buffer)
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{
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return i2c_write(0, 0xe6, address, count, buffer);
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}
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unsigned char pmu_read(int address)
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{
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unsigned char tmp;
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pmu_read_multiple(address, 1, &tmp);
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return tmp;
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}
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int pmu_write(int address, unsigned char val)
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{
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return pmu_write_multiple(address, 1, &val);
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}
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#if 0
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void pmu_ldo_on_in_standby(unsigned int ldo, int onoff)
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{
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if (ldo < 4)
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{
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unsigned char newval = pmu_read(0x3B) & ~(1 << (2 * ldo));
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if (onoff) newval |= 1 << (2 * ldo);
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pmu_write(0x3B, newval);
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}
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else if (ldo < 8)
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{
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unsigned char newval = pmu_read(0x3C) & ~(1 << (2 * (ldo - 4)));
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if (onoff) newval |= 1 << (2 * (ldo - 4));
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pmu_write(0x3C, newval);
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}
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}
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void pmu_ldo_set_voltage(unsigned int ldo, unsigned char voltage)
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{
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if (ldo > 6) return;
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pmu_write(0x2d + (ldo << 1), voltage);
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}
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void pmu_hdd_power(bool on)
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{
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pmu_write(0x1b, on ? 1 : 0);
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}
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void pmu_ldo_power_on(unsigned int ldo)
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{
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if (ldo > 6) return;
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pmu_write(0x2e + (ldo << 1), 1);
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}
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void pmu_ldo_power_off(unsigned int ldo)
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{
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if (ldo > 6) return;
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pmu_write(0x2e + (ldo << 1), 0);
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}
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#endif
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void pmu_set_wake_condition(unsigned char condition)
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{
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// TODO
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(void) condition;
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}
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void pmu_enter_standby(void)
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{
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// TODO
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}
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#ifdef HAVE_ADJUSTABLE_CPU_FREQ
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void pmu_set_cpu_voltage(bool high)
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{
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// TODO
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(void) high;
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}
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#endif
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#if (CONFIG_RTC == RTC_NANO4G)
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void pmu_read_rtc(unsigned char* buffer)
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{
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// TODO
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(void) buffer;
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}
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void pmu_write_rtc(unsigned char* buffer)
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{
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// TODO
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(void) buffer;
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}
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#endif
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void pmu_set_usblimit(bool fast_charge)
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{
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// TODO
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(void) fast_charge;
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}
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/*
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* ADC
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*/
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static struct mutex pmu_adc_mutex;
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/* converts raw value to millivolts */
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unsigned short pmu_adc_raw2mv(
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const struct pmu_adc_channel *ch, unsigned short raw)
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{
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// TODO
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(void) ch;
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(void) raw;
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return 0;
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}
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/* returns raw value */
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unsigned short pmu_read_adc(const struct pmu_adc_channel *ch)
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{
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// TODO
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int raw = 0;
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mutex_lock(&pmu_adc_mutex);
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(void) ch;
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mutex_unlock(&pmu_adc_mutex);
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return raw;
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}
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/*
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* eINT
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*/
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#define Q_EINT 0
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static long pmu_thread_stack[DEFAULT_STACK_SIZE/2/sizeof(long)];
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static struct event_queue pmu_queue;
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static unsigned char ints_msk[3];
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static void pmu_eint_isr(struct eic_handler*);
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static struct eic_handler pmu_eint =
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{
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.gpio_n = GPIO_EINT_PMU,
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.type = EIC_INTTYPE_LEVEL,
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.level = EIC_INTLEVEL_LOW,
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.isr = pmu_eint_isr,
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};
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static int pmu_input_holdswitch;
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int pmu_holdswitch_locked(void)
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{
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return pmu_input_holdswitch;
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}
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#ifdef IPOD_ACCESSORY_PROTOCOL
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static int pmu_input_accessory;
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int pmu_accessory_present(void)
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{
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return pmu_input_accessory;
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}
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#endif
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#if CONFIG_CHARGING
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static int pmu_input_firewire;
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int pmu_firewire_present(void)
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{
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return pmu_input_firewire;
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}
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#endif
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#if 1 // XXX: from usb-s5l8702.c
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#include "usb.h"
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static int usb_status = USB_EXTRACTED;
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int usb_detect(void)
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{
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return usb_status;
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}
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void usb_insert_int(void)
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{
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usb_status = USB_INSERTED;
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}
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void usb_remove_int(void)
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{
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usb_status = USB_EXTRACTED;
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}
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#endif
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static void pmu_read_inputs(void)
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{
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#if CONFIG_CHARGING
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unsigned char status[3];
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#else
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unsigned char status[2];
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#endif
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pmu_read_multiple(D1759_REG_STATUSA, sizeof(status), status);
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if (status[0] & D1759_STATUSA_VBUS)
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usb_insert_int();
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else
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usb_remove_int();
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#ifdef IPOD_ACCESSORY_PROTOCOL
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pmu_input_accessory = !!(status[0] & D1759_STATUSA_INPUT1);
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#endif
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pmu_input_holdswitch = !(status[1] & D1759_STATUSB_INPUT2);
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#if CONFIG_CHARGING
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pmu_input_firewire = !!(status[2] & D1759_STATUSC_VADAPTOR);
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#endif
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}
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static void pmu_eint_isr(struct eic_handler *h)
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{
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eint_unregister(h);
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queue_post(&pmu_queue, Q_EINT, 0);
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}
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static void NORETURN_ATTR pmu_thread(void)
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{
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struct queue_event ev;
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while (true)
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{
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queue_wait_w_tmo(&pmu_queue, &ev, TIMEOUT_BLOCK);
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switch (ev.id)
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{
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case Q_EINT:
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/* clear all PMU interrupts, this will also raise
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(disable) the PMU IRQ pin */
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#if CONFIG_CHARGING
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pmu_write_multiple(D1759_REG_EVENTA, 3, "\xFF\xFF\xFF");
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#else
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pmu_write_multiple(D1759_REG_EVENTA, 2, "\xFF\xFF");
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#endif
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/* get actual values */
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pmu_read_inputs();
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eint_register(&pmu_eint);
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break;
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case SYS_TIMEOUT:
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break;
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}
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}
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}
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/* main init */
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void pmu_init(void)
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{
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mutex_init(&pmu_adc_mutex);
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queue_init(&pmu_queue, false);
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create_thread(pmu_thread,
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pmu_thread_stack, sizeof(pmu_thread_stack), 0,
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"PMU" IF_PRIO(, PRIORITY_SYSTEM) IF_COP(, CPU));
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/* configure PMU interrutps */
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ints_msk[0] = 0xff;
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ints_msk[1] = 0xff;
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ints_msk[2] = 0xff;
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ints_msk[0] &= ~D1759_IRQMASKA_VBUS; /* USB */
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#ifdef IPOD_ACCESSORY_PROTOCOL
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ints_msk[0] &= ~D1759_IRQMASKA_INPUT1; /* Accessory */
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#endif
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ints_msk[1] &= ~D1759_IRQMASKB_INPUT2; /* Holdswitch */
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#if CONFIG_CHARGING
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ints_msk[2] &= ~D1759_IRQMASKC_VADAPTOR; /* FireWire */
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#endif
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pmu_write_multiple(D1759_REG_IRQMASKA, 3, ints_msk);
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/* clear all interrupts */
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pmu_write_multiple(D1759_REG_EVENTA, 3, "\xFF\xFF\xFF");
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/* get initial values */
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pmu_read_inputs();
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eint_register(&pmu_eint);
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}
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/*
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* preinit
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*/
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int pmu_rd_multiple(int address, int count, unsigned char* buffer)
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{
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return i2c_rd(0, 0xe6, address, count, buffer);
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}
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int pmu_wr_multiple(int address, int count, unsigned char* buffer)
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{
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return i2c_wr(0, 0xe6, address, count, buffer);
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}
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unsigned char pmu_rd(int address)
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{
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unsigned char val;
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pmu_rd_multiple(address, 1, &val);
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return val;
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}
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int pmu_wr(int address, unsigned char val)
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{
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return pmu_wr_multiple(address, 1, &val);
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}
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void pmu_preinit(void)
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{
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pmu_wr(0x14, 0x13);
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pmu_wr(0x15, 0x0d);
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pmu_wr(0xb, 0x22);
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if (pmu_rd(0x7f) & 1)
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pmu_wr(0xd, (pmu_rd(0xd) & 0xdf));
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// if (unknown_boot_config & 1) // XXX: could it be disabling some LDO??? remember that in this type of PMU the LDO enable bits are
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// pmu_wr(0xd, (pmu_rd(0xd) & 0xdf)); // located in other registers different from the voltage configuration???
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// TBC: LDOs ???
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pmu_wr(0x1f, 0x14);
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pmu_wr(0x1a, 0xb2); // XXX: 0xA & 0x12, maybe it's an option to always ON, or ON in stby or something like that, could it be the ARM7 ???
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pmu_wr(0x1a, 0xb2); // XXX: repeat, posibly a typo ??? ??? ???
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pmu_wr(0x19, 0x14); // XXX: TBC: NAND (by similarity with nano3g)
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pmu_wr(0x21, 0x6);
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pmu_wr(0x1d, 0x12);
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pmu_wr(0x10, (pmu_rd(0x10) & 0x7f) | 0x60);
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pmu_wr(0x44, 0x72); // TBC: 0x40+ seems related to ADC
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pmu_wr(0x40, pmu_rd(0x40) | 0x40);
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pmu_wr(0x33, (pmu_rd(0x33) & 0x3) | 0x50);
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pmu_wr(0x34, (pmu_rd(0x34) & 0x80) | 0x54); // XXX: see DA9030 page 110 charge_control REG 0x28
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pmu_wr(0x22, 0);
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/* configure and clear interrupts */
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pmu_wr_multiple(D1759_REG_IRQMASKA, 3, "\x50\xFE\x2B");
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pmu_wr_multiple(D1759_REG_EVENTA, 3, "\xFF\xFF\xFF");
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pmu_wr(D1759_REG_LEDOUT, 0x64); /* set backlight brightness to 40% */
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pmu_wr(D1759_REG_LEDCTL,
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pmu_rd(D1759_REG_LEDCTL) | D1759_LEDCTL_ENABLE); /* backlight on */
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pmu_wr(0xa, 0x70);
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pmu_wr(0x13, 0x02);
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}
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#ifdef BOOTLOADER
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bool pmu_is_hibernated(void)
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{
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return !!(pmu_rd(D1759_REG_EVENTB) & D1759_EVENTB_WARMBOOT);
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}
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#endif
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