William Wilgus 89acde6af2 H10 PP Crash -- Fixed ... This appears to finally fix the issue turns out the status register we were writing was only for the CPU COP cache flush wiped out the CPU cache -- Added some defines to cut down on the magic numbers Added some comments explaining such Set the address to full 20 bit address 0x1FFFFF which is then left shifted 11 internally -- somewhere around 4GB? Link explains the cache status bits https://daniel.haxx.se/sansa/memory_controller.txt Change-Id: I57b7187c2f71a5b54ce145bf3a21ed492a8993cb		2021-04-01 00:52:57 -04:00
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arm	H10 PP Crash -- Fixed	2021-04-01 00:52:57 -04:00
coldfire	h300, Others Bugfix Bootloader backlight_init()	2020-11-13 18:08:01 +00:00
hosted	Add M3K native to the simulator	2021-03-28 12:08:31 -04:00
mips	New port: FiiO M3K on bare metal	2021-03-28 00:01:37 +00:00