It seems that lowering the operating frequency for the SD cards has made some uSD cards have problems with the init process.
By moving the boost from ident to operating frequency to after the switch to HS timing these card now seem to init normally.
We still need to fix the problem where the internal cards and non HS uSD cards are still slightly overclocked at 31 MHz.
As of now we experience data crc failures during writes at the next lower frequency of 15.5 MHz.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23870 a1c6a512-1295-4272-9138-f99709370657
This is within the SD Spec for v2 High Speed cards but still over the 25 MHz limit for v1 and non-HS v2 cards.
Test_disk write & verify passes on both internal and uSD.
The v1 cards still need to be lowered to 15 MHz but that causes data crc failures at this point.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23835 a1c6a512-1295-4272-9138-f99709370657
Currently the bypass bit is not cleared so it's possible to enter the identification phase at bypass speed instead of ident speed.
The simplest solution to ensure the bypass bit is not set is to set the register with an = operation instead of |=.
This makes setting the MCI_CLOCK register at the end of the controller init unnecessary.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23830 a1c6a512-1295-4272-9138-f99709370657
bits 13:0 must not be modified (except for bit 8 ?)
fixes FM on my Clipv1 (some Clips weren't affected)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23826 a1c6a512-1295-4272-9138-f99709370657
If the controllers were already enabled there was a chance we could try to read the MCI_CLOCK registers while the cards were buffering and then disable the controllers prematurely.
I guess funman knows and sees all!! Thanks funman.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23811 a1c6a512-1295-4272-9138-f99709370657
Because we turn off the clocks to the SD controllers between disk accesses we were unable to read the MCI_CLOCK registers until there was a disk access. Now we can read them immediately.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23810 a1c6a512-1295-4272-9138-f99709370657
Enabling/disabling of the NAF and IDE clocks is now grouped together as both are related to the internal SD.
Sequence for disabling SD now mirrors the enable sequence.
Comments added to make it easier to follow the configuration change for XPD from gpio to mci-sd and back.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23808 a1c6a512-1295-4272-9138-f99709370657
- Use the fact that unicode code currently does not support chars above 0xffff
(see utf8decode()), and change diacritic database's char code type to
unsigned short from int. Also comment out database entries above unsupported
range.
- Use const when possible.
- Iterate over buffer using the buffer's pointer, thus avoiding usage of some
variables, and avoiding multiple access to the same array item.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23776 a1c6a512-1295-4272-9138-f99709370657
- Fix bug which cause wrong placement of characters in some specific conditions
- Fix multiple similar entries in cache
- Protect against negative x values passed to drawing function
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23765 a1c6a512-1295-4272-9138-f99709370657
We had 3 different references to the same value. Rockbox always uses a blocksize of 512 bytes for SD and we were using SECTOR_SIZE, SD_BLOCK_SIZE, & card_info[drive].blocksize to use this value. Now the only reference being used is SD_BLOCK_SIZE.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23746 a1c6a512-1295-4272-9138-f99709370657
This commit corrects the display of diacritic characters, which exist in many
languages. Hopefully, it will make Rockbox much more usable for users of these
languages.
Diacritic information (which used to decide whether a given character is
diacritic or not) is taken from the Unicode Standard, Version 5.2.
This feature does not affect drawing performance much, as the diacritic
database is cached (simple MRU mechanism).
There may be room for further performance, footprint, and
code-reuse wise improvements, that could be worked on in the future.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23742 a1c6a512-1295-4272-9138-f99709370657
Patch by Boris Gjenero (dreamlayers). Writes are retried on failure now so this should be safe.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23741 a1c6a512-1295-4272-9138-f99709370657
Writes will now be retried if they fail, and will be done using multisector transfers which should be faster.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23740 a1c6a512-1295-4272-9138-f99709370657
Flyspray: FS#10371
Authors: Fred Bauer and myself
Only enabled on e200v2 and Fuze (crashes on clipv1)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23739 a1c6a512-1295-4272-9138-f99709370657
When read it returns all enabled interrupt sources
When written it enables interrupt sources for each bit set
So just like VIC_INT_EN_CLEAR, we don't have to read the previous value
before writing to it (VIC_INT_EN_CLEAR is write-only anyway)
Thanks to Fred Bauer for spotting
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23734 a1c6a512-1295-4272-9138-f99709370657
We don't need to check the FIFO for MCI_RX_ACTIVE because we don't experience problems reading from the SD cards.
We need the MCI_TX_ACTIVE FIFO check during writes because some SD cards spend longer times in the PRG state
programming the data that has been written to them.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23733 a1c6a512-1295-4272-9138-f99709370657
