2 commits

Author	SHA1	Message	Date
Amaury Pouly	56340f4cd0	hwstub: add the possibility to flush caches before exec ... This is needed on the jz4760b because if some data is loaded to DRAM, then it is cached and a disaster lurks if dcaches/icache are not flushed. Targets that needs this must define CONFIG_FLUSH_CACHES in target-config.h and implement target_flush_caches(). Currently MIPS has some generic code for mips32r1 that requires to define {D,I}CACHE_SIZE and {D,I}CACHE_LINE_SIZE in target-config.h Change-Id: I5a3fc085de9445d8c8a2eb61ae4e2dc9bb6b4e8e	2017-01-24 15:25:14 +01:00
Amaury Pouly	2cdfc43f10	hwstub: implement read/write data abort recovery ... Change-Id: I1625873b6864584c40984723d82548ad242ee08e	2015-01-13 23:35:33 +01:00