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14 commits

Author SHA1 Message Date
Solomon Peachy
bcee6318f0 headergen_v2: Add additional generator types to help output
Change-Id: I070c9554958c45e78462b8515cdce56fcee1a5ed
2025-04-20 16:26:50 -04:00
Aidan MacDonald
ecfc62cda6 headergen_v2: add ST generator for STM32 family
Change-Id: Id8f06a6f77cc58d3f0f94b72108dc91ba8037813
2025-04-20 16:25:58 -04:00
Aidan MacDonald
2db0627d38 headergen_v2: add ARM Cortex-M generator
Change-Id: If9059b0964ce6f905aa230139eb78b800ff6a102
2025-04-20 16:25:58 -04:00
Aidan MacDonald
08f800d5b8 headergen_v2: only generate MT_REG_INDEX macro when needed
This is only needed if the generator sets has_sct() to true.

Change-Id: Ie7fcb6a1f0f9d27e9ef8a5558c12a66ab6da4394
2025-04-20 15:53:54 -04:00
Aidan MacDonald
af9156406d headergen_v2: only generate GET_VARIANT macro if needed
This is an internal macro which is only used if has_sct()
is set by the generator, so don't generate it if we don't
need to.

Change-Id: I7ad51ad34ecabd833b84a270b5046e77131dcb41
2025-04-20 15:53:54 -04:00
Aidan MacDonald
f50455f6a7 headergen_v2: increase macro argument limit to 20
When registers have lot of 1- and 2-bit fields it's possible
to exceed the 13 argument limit. Usually this only shows up
when programming a configuration register, but it's annoying
to have to split up the write. 20 arguments should be enough
to avoid that.

Change-Id: I6240fae4a51ae14600afcfb8a4e3f1e983cbffa6
2025-04-20 15:53:54 -04:00
Aidan MacDonald
cffd158ace headergen_v2: add helper macros for base+offset addressing
Add a relative version of the register/field read/write operations
which takes a base address (which may be a void pointer or integer)
and computes the register address using offsets.

Change-Id: I7c012192e67adcd675a0fc1975ca4b16ed87bcac
2025-04-20 15:53:54 -04:00
Aidan MacDonald
387f67cab6 headergen_v2: add floating instances and nochild flag
Floating instances don't have an address and will only generate
child nodes and registers with offsets. The 'nochild' flag will
disable generating the children for a node but will generate the
node's own address, which can be used to generate base addresses.

Change-Id: Ib1014de94531436d5708db46aa684741e7740ace
2025-04-20 15:53:54 -04:00
Aidan MacDonald
0f5c2877fe headergen_v2: generate register offsets and node addresses
Register offsets are defined as the address of the register minus
the address of the parent node. If enabled by the generator, these
will be emitted alongside defines for the node base addresses.

This allows the base address to be stored in a variable, and the
offset can be used to access registers relative to the base.

Change-Id: I15576aeb2945293a259007da7f00a26055f4d0f0
2025-04-20 15:53:54 -04:00
Amaury Pouly
d2dbd36db4 Add atj generator to headergen_v2
This requires a small change to support headers without supports macros. This
generates much simpler macros but disable more advanced macros such as BF_SET,
BF_WR and friends.

Change-Id: Icb5470c3f3e816e83335b4ecfa465be6c26be007
2024-10-27 09:07:59 -04:00
Aidan MacDonald
b8945734f5 Make headergen_v2's output include what it uses
Change-Id: Ie9790faac44c33a170bc2dc39d706575cefa0f2f
2021-02-27 22:02:31 +00:00
Amaury Pouly
51cce81cd4 headergen_v2: add two new macros to write a raw write to set/clr variants
These macros are like jz_setf but instead of writing fields, they write a
raw value directly: jz_set(REG, value) and jz_clr(REG, value).

Change-Id: I660f20dd691b26d367533877875fc3226a26c992
2017-01-24 15:25:14 +01:00
Amaury Pouly
7b1bcae879 regtools: rename error_t to err_t to avoid name clash
Change-Id: Ib8d34e4f58f3225b1dafc533ce7e1b7867ad053b
2016-09-21 00:31:12 +01:00
Amaury Pouly
e62203aac1 regtools: add headergen_v2
This new header generator works differently from the previous one:
- it uses the new format
- the generated macro follow a different style (see below)
- the generated macro are highly documented!
- it supports SCT-style platform or RMW-style ones

Compared to the old style, the new one generate a big set of macros per
register/field/enum (loosely related to iohw.h from Embedded C spec). The user
then calls generic (names are customizable) macros to perform operations:

reg_read(REG_A)
reg_read(REG_B(3))
reg_read_field(REG_A, FIELD_X)
reg_read_field(REG_B(3), COOL_FIELD)
reg_write(REG_A, 0x42)
reg_write_field(REG_A, FIELD_X(1), FIELD_Y(3), IRQ_V(FIQ))
reg_write_fielc(REG_B(3), COOL_FIELD_V(I_AM_COOL), BLA(42))

the following use RMW or SET/CLR variants, depending on target:
reg_set_field(REG_A, FLAG_U, FLAG_V)
reg_clr_field(REG_A, FIELD_X, FIELD_Y, IRQ)
reg_clr_field(REG_B(3), COOL_FIELD, BLA)

the following does clear followed by set, on SET/CLR targets:
reg_cs(REG_A, 0xff, 0x42)
reg_cs(REG_B(3), 0xaa, 0x55)
reg_cs_field(REG_A, FIELD_X(1), FIELD_Y(3), IRQ_V(FIQ))
reg_cs_field(REG_B(3), COOL_FIELD_V(I_AM_COOL))

The generator code is pretty long but has lots of documentation and lots of
macro names can be customized.

Change-Id: I5d6c5ec2406e58b5da11a5240c3a409a5bb5239a
2016-05-25 00:11:07 +01:00