forked from len0rd/rockbox
SPC Codec: Restore correct FIR buffer alignment when an address mask is used. It must be FIR_BUF_ALIGN. Fix Coldfire assembly constraint where an input parameter was also being written.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30063 a1c6a512-1295-4272-9138-f99709370657
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4b0e09c1ac
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1 changed files with 6 additions and 4 deletions
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@ -28,7 +28,8 @@
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#include "spc_profiler.h"
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#if defined(CPU_COLDFIRE) || defined (CPU_ARM)
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int32_t fir_buf[FIR_BUF_CNT] IBSS_ATTR_SPC MEM_ALIGN_ATTR;
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int32_t fir_buf[FIR_BUF_CNT] IBSS_ATTR_SPC
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__attribute__((aligned(FIR_BUF_ALIGN*1)));
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#endif
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#if SPC_BRRCACHE
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/* a little extra for samples that go past end */
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@ -1276,6 +1277,8 @@ void DSP_run_( struct Spc_Dsp* this, long count, int32_t* out_buf )
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/* Feedback into echo buffer */
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if ( !(this->r.g.flags & 0x20) )
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{
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int sh = 1 << 9;
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asm volatile (
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/* scale echo voices; saturate if overflow */
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"mac.l %[sh], %[e1] , %%acc1 \r\n"
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@ -1298,11 +1301,10 @@ void DSP_run_( struct Spc_Dsp* this, long count, int32_t* out_buf )
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"or.l %[sh], %[e0] \r\n"
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/* save final feedback into echo buffer */
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"move.l %[e0], (%[echo_ptr]) \r\n"
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: [e0]"+d"(echo_0), [e1]"+d"(echo_1)
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: [e0]"+d"(echo_0), [e1]"+d"(echo_1), [sh]"+d"(sh)
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: [out_0]"r"(out_0), [out_1]"r"(out_1),
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[ef]"r"((int)this->r.g.echo_feedback),
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[echo_ptr]"a"((int32_t *)echo_ptr),
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[sh]"d"(1 << 9)
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[echo_ptr]"a"((int32_t *)echo_ptr)
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);
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}
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