From fb99d890a8ed5da627885da62f85c9f5bcd08d47 Mon Sep 17 00:00:00 2001 From: Aidan MacDonald Date: Thu, 4 Mar 2021 19:38:14 +0000 Subject: [PATCH] Fix typo in MIPS cache discard Change-Id: I6a06e5f3098324d985bd59322755cd68122ec0bf --- firmware/target/mips/mmu-mips.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/firmware/target/mips/mmu-mips.c b/firmware/target/mips/mmu-mips.c index 4f2de528bd..2daed5ed9e 100644 --- a/firmware/target/mips/mmu-mips.c +++ b/firmware/target/mips/mmu-mips.c @@ -234,7 +234,7 @@ void discard_dcache_range(const void *base, unsigned int size) cacheline and shrink down the region to discard. */ if (ptr != end && (end !=((char*)base + size))) { end -= CACHEALIGN_SIZE; - __CACHE_OP(DCHitWBInv, ptr); + __CACHE_OP(DCHitWBInv, end); } /* Finally, discard whatever is left */