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TMS320DM320: Ensure udelay() will not end before specified amount of time.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31398 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Tomasz Moń 2011-12-21 21:11:38 +00:00
parent b4ffcb5224
commit f805b5d361
1 changed files with 27 additions and 4 deletions
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31
firmware/target/arm/tms320dm320/system-dm320.c
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@ -413,13 +413,35 @@ void set_cpu_frequency(long frequency)
#endif #endif
/* /*
* Waits for specified amount of microseconds * Waits for specified amount of microseconds (or longer, but NEVER less)
*
* Maximum supported usec value is 10000, use sleep() for longer delays.
*/ */
void udelay(int usec) { void udelay(int usec) {
/*
* count and prev_tick must be initialized as soon as posible (right
* after function entry)
*
* count must be initialized before prev_count
*/
unsigned short count = IO_TIMER1_TMCNT; unsigned short count = IO_TIMER1_TMCNT;
long prev_tick = current_tick;
/* initialization time/sequence of these values is not critical */
unsigned short stop; unsigned short stop;
unsigned short tmp = IO_TIMER1_TMDIV; unsigned short tmp = IO_TIMER1_TMDIV;
int prev_tick = current_tick;
if (!irq_enabled())
{
/*
* Interrupts are disabled
*
* Clear TIMER1 interrupt to prevent returning from this fuction
* before specified amount of time has passed
* In worst case this makes udelay() take one tick longer
*/
IO_INTC_IRQ0 = INTR_IRQ0_TMR1;
}
/* /*
* On Sansa Connect tick timer counts from 0 to 26999 * On Sansa Connect tick timer counts from 0 to 26999
@ -450,13 +472,14 @@ void udelay(int usec) {
/* udelay will end after counter reset (tick) */ /* udelay will end after counter reset (tick) */
while ((IO_TIMER1_TMCNT < stop) || while ((IO_TIMER1_TMCNT < stop) ||
((current_tick == prev_tick) /* ensure new tick */ && ((current_tick == prev_tick) /* ensure new tick */ &&
(IO_INTC_IRQ0 & (1 << 1)))); /* prevent lock */ (IO_INTC_IRQ0 & INTR_IRQ0_TMR1))); /* prevent lock */
} }
else else
{ {
/* udelay will end before counter reset (tick) */ /* udelay will end before counter reset (tick) */
while ((IO_TIMER1_TMCNT < stop) && while ((IO_TIMER1_TMCNT < stop) &&
((current_tick == prev_tick) && (IO_INTC_IRQ0 & (1 << 1)))); ((current_tick == prev_tick) &&
(IO_INTC_IRQ0 & INTR_IRQ0_TMR1)));
} }
} }