forked from len0rd/rockbox
Faster idct for ARMv6. Overall mpegplayer speedup is quite minimal though.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21392 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jens Arnold
parent
e7c4cd9076
commit
f289b9f591
3 changed files with 342 additions and 1 deletions
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@ -9,7 +9,11 @@ idct_coldfire.S
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motion_comp_coldfire_c.c
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motion_comp_coldfire_s.S
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#elif defined CPU_ARM
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#if ARM_ARCH >= 6
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idct_armv6.S
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#else
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idct_arm.S
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#endif
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motion_comp_arm_c.c
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motion_comp_arm_s.S
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#else /* other CPU or SIM */
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@ -35,7 +35,7 @@
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#define BUFFER_SIZE (1194 * 1024)
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#ifdef CPU_COLDFIRE
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#if defined(CPU_COLDFIRE) || (defined(CPU_ARM) && ARM_ARCH >= 6)
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/* twice as large as on other targets because coldfire uses
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* a secondary, transposed buffer for optimisation */
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static int16_t static_dct_block[128] IBSS_ATTR ATTR_ALIGN(16);
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337
apps/plugins/mpegplayer/idct_armv6.S
Normal file
337
apps/plugins/mpegplayer/idct_armv6.S
Normal file
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@ -0,0 +1,337 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2009 by Jens Arnold
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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.global mpeg2_idct_copy
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.type mpeg2_idct_copy, %function
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.global mpeg2_idct_add
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.type mpeg2_idct_add, %function
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/* Custom calling convention:
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* r0 contains block pointer and is non-volatile
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* all non-volatile c context saved and restored on its behalf
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*/
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.idct:
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str lr, [sp, #-4]! @ lr is used
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add r1, r0, #128 @ secondary, transposed temp buffer
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mov r14, #8 @ loop counter
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.row_loop:
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ldmia r0!, {r2, r3, r10, r11} @ fetch f0, f2, f4, f6, f1, f3, f5, f7
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ldrd r4, L_W1357 @ load W1, W3, W5, W7
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smuad r6, r4, r10 @ b0 = W1 * f1 + W3 * f3
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smlad r6, r5, r11, r6 @ + W5 * f5 + W7 * f7
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smultt r7, r5, r10 @ b1 = -W7 * f3
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smlabb r7, r4, r11, r7 @ + -W1 * f5
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smlabt r7, r5, r11, r7 @ + -W5 * f7
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rsb r7, r7, #0
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smlatb r7, r4, r10, r7 @ + W3 * f1
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smulbt r8, r4, r10 @ b2 = -W1 * f3
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rsb r8, r8, #0
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smlabb r8, r5, r10, r8 @ + W5 * f1
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smlatb r8, r5, r11, r8 @ + W7 * f5
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smlatt r8, r4, r11, r8 @ + W3 * f7
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smusdx r9, r10, r5 @ b3 = f1 * W7 - f3 * W5
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smlsdx r9, r11, r4, r9 @ + f5 * W3 - f1 * W1
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ldrd r4, L_W0246 @ load W0, W2, W4, W6
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add r2, r2, #1 @ f0 += 1
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smulbb r10, r4, r2 @ a0' = W0 * f0
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smlabb r10, r5, r3, r10 @ + W4 * f4
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smultt r12, r4, r2 @ a3' = W2 * f2
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smlatt r12, r5, r3, r12 @ + W6 * f6
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add r10, r10, r12 @ a0 = a0' + a3'
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sub r12, r10, r12, lsl #1 @ a3 = a0 - 2 * a3'
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smulbb r11, r5, r3 @ a1' = -W4 * f4
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rsb r11, r11, #0
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smlabb r11, r4, r2, r11 @ + W0 * f0
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smultt r3, r4, r3 @ a2' = -W2 * f6
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rsb r3, r3, #0
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smlatt r3, r5, r2, r3 @ + W6 * f2
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add r11, r11, r3 @ a1 = a1' + a2'
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sub r3, r11, r3, lsl #1 @ a2 = a1 - 2 * a2'
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sub r2, r10, r6 @ block[7] = (a0 - b0)
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mov r2, r2, asr #12 @ >> 12
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strh r2, [r1, #7*16]
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sub r2, r11, r7 @ block[6] = (a1 - b1)
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mov r2, r2, asr #12 @ >> 12
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strh r2, [r1, #6*16]
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sub r2, r3, r8 @ block[5] = (a2 - b2)
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mov r2, r2, asr #12 @ >> 12
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strh r2, [r1, #5*16]
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sub r2, r12, r9 @ block[4] = (a3 - b3)
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mov r2, r2, asr #12 @ >> 12
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strh r2, [r1, #4*16]
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add r2, r12, r9 @ block[3] = (a3 + b3)
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mov r2, r2, asr #12 @ >> 12
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strh r2, [r1, #3*16]
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add r2, r3, r8 @ block[2] = (a2 + b2)
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mov r2, r2, asr #12 @ >> 12
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strh r2, [r1, #2*16]
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add r2, r11, r7 @ block[1] = (a1 + b1)
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mov r2, r2, asr #12 @ >> 12
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strh r2, [r1, #1*16]
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add r2, r10, r6 @ block[0] = (a0 + b0)
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mov r2, r2, asr #12 @ >> 12
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strh r2, [r1], #2 @ advance to next temp column
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subs r14, r14, #1
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bne .row_loop
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b .col_start
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@placed here because of ldrd's offset limit
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L_W1357:
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.short 2841
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.short 2408
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.short 1609
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.short 565
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L_W0246:
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.short 2048
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.short 2676
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.short 2048
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.short 1108
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.col_start:
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@ r0 now points to the temp buffer, where we need it.
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sub r1, r1, #128+16 @ point r1 back to the input block
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mov r14, #8 @ loop counter
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.col_loop:
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ldmia r0!, {r2, r3, r10, r11} @ fetch f0, f2, f4, f6, f1, f3, f5, f7
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ldrd r4, L_W1357 @ load W1, W3, W5, W7
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smuad r6, r4, r10 @ b0 = W1 * f1 + W3 * f3
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smlad r6, r5, r11, r6 @ + W5 * f5 + W7 * f7
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smultt r7, r5, r10 @ b1 = -W7 * f3
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smlabb r7, r4, r11, r7 @ + -W1 * f5
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smlabt r7, r5, r11, r7 @ + -W5 * f7
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rsb r7, r7, #0
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smlatb r7, r4, r10, r7 @ + W3 * f1
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smulbt r8, r4, r10 @ b2 = -W1 * f3
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rsb r8, r8, #0
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smlabb r8, r5, r10, r8 @ + W5 * f1
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smlatb r8, r5, r11, r8 @ + W7 * f5
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smlatt r8, r4, r11, r8 @ + W3 * f7
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smusdx r9, r10, r5 @ b3 = f1 * W7 - f3 * W5
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smlsdx r9, r11, r4, r9 @ + f5 * W3 - f1 * W1
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ldrd r4, L_W0246 @ load W0, W2, W4, W6
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add r2, r2, #32 @ DC offset: 0.5
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smulbb r10, r4, r2 @ a0' = W0 * f0
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smlabb r10, r5, r3, r10 @ + W4 * f4
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smultt r12, r4, r2 @ a3' = W2 * f2
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smlatt r12, r5, r3, r12 @ + W6 * f6
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add r10, r10, r12 @ a0 = a0' + a3'
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sub r12, r10, r12, lsl #1 @ a3 = a0 - 2 * a3'
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smulbb r11, r5, r3 @ a1' = -W4 * f4
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rsb r11, r11, #0
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smlabb r11, r4, r2, r11 @ + W0 * f0
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smultt r3, r4, r3 @ a2' = -W2 * f6
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rsb r3, r3, #0
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smlatt r3, r5, r2, r3 @ + W6 * f2
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add r11, r11, r3 @ a1 = a1' + a2'
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sub r3, r11, r3, lsl #1 @ a2 = a1 - 2 * a2'
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sub r2, r10, r6 @ block[7] = (a0 - b0)
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mov r2, r2, asr #17 @ >> 17
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strh r2, [r1, #7*16]
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sub r2, r11, r7 @ block[6] = (a1 - b1)
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mov r2, r2, asr #17 @ >> 17
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strh r2, [r1, #6*16]
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sub r2, r3, r8 @ block[5] = (a2 - b2)
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mov r2, r2, asr #17 @ >> 17
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strh r2, [r1, #5*16]
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sub r2, r12, r9 @ block[4] = (a3 - b3)
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mov r2, r2, asr #17 @ >> 17
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strh r2, [r1, #4*16]
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add r2, r12, r9 @ block[3] = (a3 + b3)
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mov r2, r2, asr #17 @ >> 17
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strh r2, [r1, #3*16]
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add r2, r3, r8 @ block[2] = (a2 + b2)
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mov r2, r2, asr #17 @ >> 17
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strh r2, [r1, #2*16]
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add r2, r11, r7 @ block[1] = (a1 + b1)
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mov r2, r2, asr #17 @ >> 17
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strh r2, [r1, #1*16]
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add r2, r10, r6 @ block[0] = (a0 + b0)
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mov r2, r2, asr #17 @ >> 17
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strh r2, [r1], #2 @ advance to next column
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subs r14, r14, #1
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bne .col_loop
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sub r0, r0, #256 @ point r0 back to the input block
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ldr pc, [sp], #4
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mpeg2_idct_copy:
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stmfd sp!, {r1-r2, r4-r12, lr}
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bl .idct
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ldmfd sp!, {r1-r2}
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add r12, r0, #128
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ldrd r4, [r0]
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mov r8, #0
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mov r9, #0
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mov r10, #0
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mov r11, #0
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1:
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ldrd r6, [r0, #8]
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usat16 r4, #8, r4
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strb r4, [r1, #0]
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mov r4, r4, lsr #16
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strb r4, [r1, #1]
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usat16 r5, #8, r5
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strb r5, [r1, #2]
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mov r5, r5, lsr #16
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strb r5, [r1, #3]
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ldrd r4, [r0, #16]
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usat16 r6, #8, r6
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strb r6, [r1, #4]
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mov r6, r6, lsr #16
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strb r6, [r1, #5]
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usat16 r7, #8, r7
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strb r7, [r1, #6]
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mov r7, r7, lsr #16
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strb r7, [r1, #7]
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stmia r0!, {r8-r11}
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add r1, r1, r2
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cmp r0, r12
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blo 1b
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ldmfd sp!, {r4-r12, pc}
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mpeg2_idct_add:
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cmp r0, #129
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mov r0, r1
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ldreqsh r1, [r0, #0]
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bne 1f
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and r1, r1, #0x70
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cmp r1, #0x40
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bne 3f
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1:
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stmfd sp!, {r2-r12, lr}
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bl .idct
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ldmfd sp!, {r1-r2}
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mov r11, #0
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add r12, r0, #128
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2:
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ldmia r0, {r3-r6}
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ldrb r7, [r1, #0]
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ldrb r8, [r1, #1]
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ldrb r9, [r1, #2]
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ldrb r10, [r1, #3]
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str r11, [r0], #4
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orr r7, r7, r8, lsl #16
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sadd16 r3, r3, r7
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usat16 r3, #8, r3
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strb r3, [r1, #0]
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mov r3, r3, lsr #16
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strb r3, [r1, #1]
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str r11, [r0], #4
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orr r9, r9, r10, lsl #16
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sadd16 r4, r4, r9
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usat16 r4, #8, r4
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strb r4, [r1, #2]
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mov r4, r4, lsr #16
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strb r4, [r1, #3]
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ldrb r7, [r1, #4]
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ldrb r8, [r1, #5]
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ldrb r9, [r1, #6]
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ldrb r10, [r1, #7]
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str r11, [r0], #4
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orr r7, r7, r8, lsl #16
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sadd16 r5, r5, r7
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usat16 r5, #8, r5
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strb r5, [r1, #4]
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mov r5, r5, lsr #16
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strb r5, [r1, #5]
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str r11, [r0], #4
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orr r9, r9, r10, lsl #16
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sadd16 r6, r6, r9
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usat16 r6, #8, r6
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strb r6, [r1, #6]
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mov r6, r6, lsr #16
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strb r6, [r1, #7]
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add r1, r1, r2
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cmp r0, r12
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blo 2b
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ldmfd sp!, {r4-r12, pc}
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3:
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stmfd sp!, {r4-r7}
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ldrsh r1, [r0, #0] /* r1 = block[0] */
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mov r11, #0
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strh r11, [r0, #0] /* block[0] = 0 */
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strh r11, [r0, #126] /* block[63] = 0 */
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add r1, r1, #64 /* r1 = DC << 7 */
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add r0, r2, r3, asl #3
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4:
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ldrb r4, [r2, #0]
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ldrb r5, [r2, #1]
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ldrb r6, [r2, #2]
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ldrb r7, [r2, #3]
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add r4, r4, r1, asr #7
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usat r4, #8, r4
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strb r4, [r2, #0]
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add r5, r5, r1, asr #7
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usat r5, #8, r5
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strb r5, [r2, #1]
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add r6, r6, r1, asr #7
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usat r6, #8, r6
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strb r6, [r2, #2]
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add r7, r7, r1, asr #7
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usat r7, #8, r7
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strb r7, [r2, #3]
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ldrb r4, [r2, #4]
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ldrb r5, [r2, #5]
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ldrb r6, [r2, #6]
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ldrb r7, [r2, #7]
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add r4, r4, r1, asr #7
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usat r4, #8, r4
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strb r4, [r2, #4]
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add r5, r5, r1, asr #7
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usat r5, #8, r5
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strb r5, [r2, #5]
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add r6, r6, r1, asr #7
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usat r6, #8, r6
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strb r6, [r2, #6]
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add r7, r7, r1, asr #7
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usat r7, #8, r7
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strb r7, [r2, #7]
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add r2, r2, r3
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cmp r2, r0
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blo 4b
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ldmfd sp!, {r4-r7}
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bx lr
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