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Get rid of some outl/inl in favour of #define.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12442 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Barry Wardell 2007-02-21 22:25:14 +00:00
parent 011bc8934c
commit f05b9e3bd5
2 changed files with 10 additions and 11 deletions
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8
firmware/target/arm/pcm-pp.c
View file

@ -208,7 +208,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
#if CONFIG_CPU == PP5020 #if CONFIG_CPU == PP5020
/* setup I2S interrupt for FIQ */ /* setup I2S interrupt for FIQ */
outl(inl(0x6000402c) | I2S_MASK, 0x6000402c); outl(inl(0x6000402c) | I2S_MASK, 0x6000402c);
outl(I2S_MASK, 0x60004024); CPU_INT_EN = I2S_MASK;
#elif CONFIG_CPU == PP5024 #elif CONFIG_CPU == PP5024
#else #else
/* setup I2S interrupt for FIQ */ /* setup I2S interrupt for FIQ */
@ -453,13 +453,13 @@ void pcm_rec_dma_start(void *addr, size_t size)
/* setup FIQ */ /* setup FIQ */
outl(inl(0x6000402c) | I2S_MASK, 0x6000402c); outl(inl(0x6000402c) | I2S_MASK, 0x6000402c);
outl(I2S_MASK, 0x60004024); CPU_INT_EN = I2S_MASK;
/* interrupt on full fifo */ /* interrupt on full fifo */
outl(inl(0x70002800) | 0x1, 0x70002800); IISCONFIG |= 0x1;
/* enable record fifo */ /* enable record fifo */
outl(inl(0x70002800) | 0x10000000, 0x70002800); IISCONFIG |= 0x10000000;
set_fiq_handler(fiq_record); set_fiq_handler(fiq_record);
enable_fiq(); enable_fiq();

13
firmware/target/arm/wmcodec-pp.c
View file

@ -37,8 +37,7 @@
/* /*
* Initialise the WM8975 for playback via headphone and line out. * Initialise the PP I2C and I2S.
* Note, I'm using the WM8750 datasheet as its apparently close.
*/ */
int audiohw_init(void) { int audiohw_init(void) {
/* reset I2C */ /* reset I2C */
@ -46,21 +45,21 @@ int audiohw_init(void) {
#if CONFIG_CPU == PP5020 #if CONFIG_CPU == PP5020
/* normal outputs for CDI and I2S pin groups */ /* normal outputs for CDI and I2S pin groups */
outl(inl(0x70000020) & ~0x300, 0x70000020); DEV_INIT &= ~0x300;
/*mini2?*/ /*mini2?*/
outl(inl(0x70000010) & ~0x3000000, 0x70000010); outl(inl(0x70000010) & ~0x3000000, 0x70000010);
/*mini2?*/ /*mini2?*/
/* device reset */ /* device reset */
outl(inl(0x60006004) | 0x800, 0x60006004); DEV_RS |= 0x800;
outl(inl(0x60006004) & ~0x800, 0x60006004); DEV_RS &=~0x800;
/* device enable */ /* device enable */
outl(inl(0x6000600C) | 0x807, 0x6000600C); DEV_EN |= 0x807;
/* enable external dev clock clocks */ /* enable external dev clock clocks */
outl(inl(0x6000600c) | 0x2, 0x6000600c); DEV_EN |= 0x2;
/* external dev clock to 24MHz */ /* external dev clock to 24MHz */
outl(inl(0x70000018) & ~0xc, 0x70000018); outl(inl(0x70000018) & ~0xc, 0x70000018);