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e200: Use 16-16 L-R pairs when writing to the TX FIFO. Kill the channel swapping and clicks. Reduce number of FIQs. Should be adaptable to iPods and other PP targets in a few minutes work, eh?

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13463 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2007-05-22 15:34:24 +00:00
parent 213e7d8472
commit e7075db2a7
3 changed files with 68 additions and 17 deletions
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60
firmware/target/arm/i2s-pp.c
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@ -46,20 +46,58 @@ void i2s_reset(void)
}
#else /* PP502X */
/* All I2S formats send MSB first */
/* Data format on the I2S bus */
#define FORMAT_MASK (0x3 << 10)
#define FORMAT_I2S (0x00 << 10)
/* Other formats not yet known */
#define FORMAT_MASK (0x3 << 10)
#define FORMAT_I2S (0x0 << 10) /* Standard I2S - leading dummy bit */
#define FORMAT_1 (0x1 << 10)
#define FORMAT_LJUST (0x2 << 10) /* Left justified - no dummy bit */
#define FORMAT_3 (0x3 << 10)
/* Other formats not yet known */
/* Data size on I2S bus */
#define SIZE_MASK (0x3 << 8)
#define SIZE_16BIT (0x00 << 10)
#define SIZE_16BIT (0x0 << 8)
/* Other sizes not yet known */
/* Data size/format on I2S FIFO */
#define FIFO_FORMAT_MASK (0x7 << 4)
#define FIFO_FORMAT_32LSB (0x03 << 4)
/* Other formats not yet known */
#define FIFO_FORMAT_MASK (0x7 << 4)
#define FIFO_FORMAT_0 (0x0 << 4)
/* Big-endian formats - data sent to the FIFO must be big endian.
* I forgot which is which size but did test them. */
#define FIFO_FORMAT_1 (0x1 << 4)
#define FIFO_FORMAT_2 (0x2 << 4)
/* 32bit-MSB-little endian */
#define FIFO_FORMAT_LE32 (0x3 << 4)
/* 16bit-MSB-little endian */
#define FIFO_FORMAT_LE16 (0x4 << 4)
/* FIFO formats 0x5 and above seem equivalent to 0x4 ?? */
/**
* PP502x
*
* IISCONFIG bits:
* | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
* | RESET | |TXFIFOEN|RXFIFOEN| | ???? | MS | ???? |
* | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
* | | | | | | | | |
* | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
* | | | | | Bus Format[1:0] | Size[1:0] |
* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
* | | Size Format[2:0] | ???? | ???? | IRQTX | IRQRX |
*
* IISFIFO_CFG bits:
* | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
* | | Free[6:0] |
* | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
* | | | | | | | | |
* | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
* | | | | RXCLR | | | | TXCLR |
* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
* | | | RX_ATN_LEVEL | | | TX_ATN_LEVEL |
*/
/* Are we I2S Master or slave? */
#define I2S_MASTER (1<<25)
@ -83,12 +121,16 @@ void i2s_reset(void)
/* FIFO.FORMAT */
/* If BIT.SIZE < FIFO.FORMAT low bits will be 0 */
IISCONFIG = ((IISCONFIG & ~FIFO_FORMAT_MASK) | FIFO_FORMAT_32LSB);
#ifdef HAVE_AS3514
/* AS3514 can only operate as I2S Slave */
IISCONFIG |= I2S_MASTER;
/* Set I2S to 44.1kHz */
outl((inl(0x70002808) & ~(0x1ff)) | 271, 0x70002808);
outl((inl(0x70002808) & ~(0x1ff)) | 33, 0x70002808);
outl(7, 0x60006080);
IISCONFIG = ((IISCONFIG & ~FIFO_FORMAT_MASK) | FIFO_FORMAT_LE16);
#else
IISCONFIG = ((IISCONFIG & ~FIFO_FORMAT_MASK) | FIFO_FORMAT_LE32);
#endif
/* RX_ATN_LVL=1 == when 12 slots full */