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* Enable clocks when needed
 * Fix VX747+ button_hold()


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19505 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Maurus Cuelenaere 2008-12-20 13:10:04 +00:00
parent 977bab5348
commit e4c09799a0
5 changed files with 17 additions and 10 deletions
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2
firmware/drivers/rtc/rtc_jz4740.c
View file

@ -297,9 +297,11 @@ int rtc_ioctl(unsigned int cmd,struct rtc_time *val,unsigned int epo)
void rtc_init(void) void rtc_init(void)
{ {
__cpm_start_rtc();
REG_RTC_RCR = RTC_RCR_RTCE; REG_RTC_RCR = RTC_RCR_RTCE;
udelay(70); udelay(70);
while( !(REG_RTC_RCR & RTC_RCR_WRDY) ); while( !(REG_RTC_RCR & RTC_RCR_WRDY) );
REG_RTC_RGR = (0x7fff | RTC_RGR_LOCK); REG_RTC_RGR = (0x7fff | RTC_RGR_LOCK);
udelay(70); udelay(70);
__cpm_stop_rtc();
} }

2
firmware/export/jz4740.h
View file

@ -3282,7 +3282,7 @@ do { \
#define __cpm_sleep_mode() \ #define __cpm_sleep_mode() \
(REG_CPM_LCR = (REG_CPM_LCR & ~CPM_LCR_LPM_MASK) | CPM_LCR_LPM_SLEEP) (REG_CPM_LCR = (REG_CPM_LCR & ~CPM_LCR_LPM_MASK) | CPM_LCR_LPM_SLEEP)
#define __cpm_stop_all() (REG_CPM_CLKGR = 0x7fff) #define __cpm_stop_all() (REG_CPM_CLKGR = 0xffff)
#define __cpm_stop_uart1() (REG_CPM_CLKGR |= CPM_CLKGR_UART1) #define __cpm_stop_uart1() (REG_CPM_CLKGR |= CPM_CLKGR_UART1)
#define __cpm_stop_uhc() (REG_CPM_CLKGR |= CPM_CLKGR_UHC) #define __cpm_stop_uhc() (REG_CPM_CLKGR |= CPM_CLKGR_UHC)
#define __cpm_stop_ipu() (REG_CPM_CLKGR |= CPM_CLKGR_IPU) #define __cpm_stop_ipu() (REG_CPM_CLKGR |= CPM_CLKGR_IPU)

1
firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
View file

@ -39,6 +39,7 @@ static struct wakeup lcd_wkup;
/* LCD init */ /* LCD init */
void lcd_init_device(void) void lcd_init_device(void)
{ {
__cpm_start_lcd();
lcd_init_controller(); lcd_init_controller();
__cpm_stop_lcd(); __cpm_stop_lcd();
lcd_is_on = true; lcd_is_on = true;

19
firmware/target/mips/ingenic_jz47xx/onda_vx747/sadc-onda_vx747.c
View file

@ -126,11 +126,11 @@ unsigned int battery_adc_voltage(void)
void button_init_device(void) void button_init_device(void)
{ {
__cpm_start_sadc();
REG_SADC_ENA = 0; REG_SADC_ENA = 0;
REG_SADC_STATE &= (~REG_SADC_STATE); REG_SADC_STATE &= (~REG_SADC_STATE);
REG_SADC_CTRL = 0x1F; REG_SADC_CTRL = 0x1F;
__cpm_start_sadc();
REG_SADC_CFG = SADC_CFG_INIT; REG_SADC_CFG = SADC_CFG_INIT;
system_enable_irq(IRQ_SADC); system_enable_irq(IRQ_SADC);
@ -184,7 +184,14 @@ static int touch_to_pixels(short x, short y)
bool button_hold(void) bool button_hold(void)
{ {
return ((~REG_GPIO_PXPIN(3)) & BTN_HOLD ? true : false); return (
#ifdef ONDA_VX747
(~REG_GPIO_PXPIN(3)) & BTN_HOLD
#elif defined(ONDA_VX747P)
(~REG_GPIO_PXPIN(2)) & BTN_HOLD
#endif
? true : false
);
} }
int button_read_device(int *data) int button_read_device(int *data)
@ -192,13 +199,7 @@ int button_read_device(int *data)
int ret = 0, tmp; int ret = 0, tmp;
/* Filter button events out if HOLD button is pressed at firmware/ level */ /* Filter button events out if HOLD button is pressed at firmware/ level */
if( if(button_hold())
#ifdef ONDA_VX747
(~REG_GPIO_PXPIN(3)) & BTN_HOLD
#elif defined(ONDA_VX747P)
(~REG_GPIO_PXPIN(2)) & BTN_HOLD
#endif
)
return 0; return 0;
tmp = (~REG_GPIO_PXPIN(3)) & BTN_MASK; tmp = (~REG_GPIO_PXPIN(3)) & BTN_MASK;

3
firmware/target/mips/ingenic_jz47xx/system-jz4740.c
View file

@ -694,6 +694,9 @@ void system_main(void)
detect_clock(); detect_clock();
/* Disable unneeded clocks, clocks are enabled when needed */
__cpm_stop_all();
/* Enable interrupts at core level */ /* Enable interrupts at core level */
sti(); sti();