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added .vectors section for ARM

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@8442 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Tomasz Malesinski 2006-01-24 23:32:53 +00:00
parent 27c616fd46
commit e0bb10420d
2 changed files with 41 additions and 13 deletions
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37
firmware/app.lds
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@ -128,8 +128,8 @@ _pluginbuf = 0;
#define IRAMSIZE 0xc000 #define IRAMSIZE 0xc000
#elif CONFIG_CPU==PNX0101 #elif CONFIG_CPU==PNX0101
#define DRAMORIG 0x24000000 + STUBOFFSET #define DRAMORIG 0x24000000 + STUBOFFSET
#define IRAMORIG 0x400100 #define IRAMORIG 0x400000
#define IRAMSIZE 0x7f00 #define IRAMSIZE 0x8000
#else #else
#define DRAMORIG 0x09000000 + STUBOFFSET #define DRAMORIG 0x09000000 + STUBOFFSET
#define IRAMORIG 0x0f000000 #define IRAMORIG 0x0f000000
@ -150,6 +150,7 @@ MEMORY
SECTIONS SECTIONS
{ {
#ifndef CPU_ARM
.vectors : .vectors :
{ {
loadaddress = .; loadaddress = .;
@ -162,6 +163,12 @@ SECTIONS
.text : .text :
{ {
#else
.text :
{
loadaddress = .;
_loadaddress = .;
#endif
. = ALIGN(0x200); . = ALIGN(0x200);
*(.init.text) *(.init.text)
*(.text*) *(.text*)
@ -193,7 +200,6 @@ SECTIONS
*(.data*) *(.data*)
. = ALIGN(0x4); . = ALIGN(0x4);
_dataend = .; _dataend = .;
_iramcopy = .;
} > DRAM } > DRAM
/DISCARD/ : /DISCARD/ :
@ -201,14 +207,31 @@ SECTIONS
*(.eh_frame) *(.eh_frame)
} }
.iram IRAMORIG : AT ( _iramcopy) #ifdef CPU_ARM
.vectors 0x0 :
{
_vectorsstart = .;
*(.vectors);
_vectorsend = .;
} AT> DRAM
_vectorscopy = LOADADDR(.vectors);
#endif
#if CONFIG_CPU==PNX0101
.iram IRAMORIG + SIZEOF(.vectors) :
#else
.iram IRAMORIG :
#endif
{ {
_iramstart = .; _iramstart = .;
*(.icode) *(.icode)
*(.irodata) *(.irodata)
*(.idata) *(.idata)
_iramend = .; _iramend = .;
} > IRAM } > IRAM AT> DRAM
_iramcopy = LOADADDR(.iram);
.ibss (NOLOAD) : .ibss (NOLOAD) :
{ {
@ -238,8 +261,10 @@ SECTIONS
} > DRAM } > DRAM
#endif #endif
#if defined(CPU_COLDFIRE) || defined(CPU_ARM) #if defined(CPU_COLDFIRE)
.bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram): .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram):
#elif defined(CPU_ARM)
.bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram) + SIZEOF(.vectors):
#else #else
.bss : .bss :
#endif #endif

17
firmware/crt0.S
View file

@ -84,13 +84,13 @@ remap_end:
#endif /* PP specific */ #endif /* PP specific */
/* Copy exception handler code to address 0 */ /* Copy exception handler code to address 0 */
ldr r2, =ecode ldr r2, =_vectorsstart
ldr r3, =ecodeend ldr r3, =_vectorsend
mov r4, #0 ldr r4, =_vectorscopy
1: 1:
cmp r3, r2 cmp r3, r2
ldrhi r5, [r2], #4 ldrhi r5, [r4], #4
strhi r5, [r4], #4 strhi r5, [r2], #4
bhi 1b bhi 1b
/* Zero out IBSS */ /* Zero out IBSS */
@ -259,7 +259,7 @@ boot_table:
/* main() should never return */ /* main() should never return */
/* Exception handlers. Will be copied to address 0 after memory remapping */ /* Exception handlers. Will be copied to address 0 after memory remapping */
ecode: .section .vectors,"aw"
ldr pc, [pc, #24] ldr pc, [pc, #24]
ldr pc, [pc, #24] ldr pc, [pc, #24]
ldr pc, [pc, #24] ldr pc, [pc, #24]
@ -270,6 +270,8 @@ ecode:
ldr pc, [pc, #24] ldr pc, [pc, #24]
/* Exception vectors */ /* Exception vectors */
.global vectors
vectors:
.word start .word start
.word undef_instr_handler .word undef_instr_handler
.word software_int_handler .word software_int_handler
@ -278,7 +280,8 @@ ecode:
.word reserved_handler .word reserved_handler
.word irq_handler .word irq_handler
.word fiq_handler .word fiq_handler
ecodeend:
.text
.global irq .global irq
.global UIE .global UIE