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Cleaned up bootloader linker control file and added the H300 target

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7916 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Linus Nielsen Feltzing 2005-11-16 23:15:59 +00:00
parent 59825952f3
commit df0e5effc5
8 changed files with 51 additions and 34 deletions

View file

@ -456,7 +456,14 @@ void backlight_init(void)
#else /* no backlight, empty dummy functions */
void backlight_init(void) {}
void backlight_init(void)
{
#if defined(IRIVER_H300_SERIES) && defined(BOOTLOADER)
or_l(0x00020000, &GPIO1_OUT);
or_l(0x00020000, &GPIO1_ENABLE);
or_l(0x00020000, &GPIO1_FUNCTION);
#endif
}
void backlight_on(void) {}
void backlight_off(void) {}
void backlight_tick(void) {}

View file

@ -12,13 +12,7 @@ OUTPUT_FORMAT(elf32-sh)
INPUT(crt0.o)
#endif
#if MEMORYSIZE >= 32
#define PLUGINSIZE 0xC0000
#else
#define PLUGINSIZE 0x8000
#endif
#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE
#define DRAMSIZE (MEMORYSIZE * 0x100000)
#ifdef IRIVER_H100_SERIES
#define DRAMORIG 0x31000000
@ -26,6 +20,12 @@ INPUT(crt0.o)
#define IRAMSIZE 0x18000
#define FLASHORIG 0x001f0000
#define FLASHSIZE 2M
#elif defined(IRIVER_H300_SERIES)
#define DRAMORIG 0x31000000
#define IRAMORIG 0x10000000
#define IRAMSIZE 0x18000
#define FLASHORIG 0x003f0000
#define FLASHSIZE 4M
#elif CONFIG_CPU == PP5020
#define DRAMORIG 0x10000000
#define IRAMORIG 0x40000000
@ -40,8 +40,6 @@ INPUT(crt0.o)
#define FLASHSIZE 256K - ROM_START
#endif
#define ENDADDR (IRAMORIG + IRAMSIZE)
#if CONFIG_CPU!=PP5020
MEMORY
{
@ -141,29 +139,22 @@ SECTIONS
stackend = .;
} > IRAM
#ifdef IRIVER_H300_SERIES
.bss DRAMORIG+0x1000000:
#else
.bss :
#endif
{
_edata = .;
*(.ibss)
*(.bss)
*(COMMON)
_end = .;
#ifdef IRIVER_H300_SERIES
} > DRAM
#else
} > IRAM
#endif
.mp3buf :
{
. = ALIGN(0x4);
_mp3buffer = .;
} > IRAM
.mp3end ENDADDR:
{
_mp3end = .;
} > IRAM
.plugin ENDADDR:
{
_pluginbuf = .;
}
}
#endif

View file

@ -1413,15 +1413,19 @@ int ata_init(void)
or_b(0x02, &PADRH); /* release ATA reset */
PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */
#elif CONFIG_CPU == MCF5249
#ifdef HAVE_ATA_LED_CTRL
/* Enable disk LED & ISD chip power control */
and_l(~0x0000240, &GPIO_OUT);
or_l(0x00000240, &GPIO_ENABLE);
or_l(0x00000200, &GPIO_FUNCTION);
#endif
/* ATA reset */
or_l(0x00080000, &GPIO_OUT);
and_l(~0x00080000, &GPIO_OUT);
or_l(0x00080000, &GPIO_ENABLE);
or_l(0x00080000, &GPIO_FUNCTION);
sleep(10);
or_l(0x00080000, &GPIO_OUT);
/* FYI: The IDECONFIGx registers are set by set_cpu_frequency() */
#elif CONFIG_CPU == PP5020

View file

@ -37,6 +37,7 @@ static volatile unsigned char *i2c_get_addr(int device);
void i2c_init(void)
{
#ifdef IRIVER_H100_SERIES
/* The FM chip has no pullup for SCL, so we have to bit-bang the
I2C for that one. */
or_l(0x00800000, &GPIO1_OUT);
@ -45,7 +46,7 @@ void i2c_init(void)
or_l(0x00000008, &GPIO_ENABLE);
or_l(0x00800000, &GPIO1_FUNCTION);
or_l(0x00000008, &GPIO_FUNCTION);
#endif
/* I2C Clock divisor = 576 => 119.952 MHz / 2 / 576 = 104.125 kHz */
MFDR = 0x14;

View file

@ -62,23 +62,25 @@ int radio_get_status(void)
void power_init(void)
{
#if CONFIG_CPU == MCF5249
#if IRIVER_H100_SERIES
or_l(0x00080000, &GPIO1_OUT);
or_l(0x00080000, &GPIO1_ENABLE);
or_l(0x00080000, &GPIO1_FUNCTION);
#if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300_SERIES)
// or_l(0x00080000, &GPIO1_OUT);
// or_l(0x00080000, &GPIO1_ENABLE);
// or_l(0x00080000, &GPIO1_FUNCTION);
#ifndef BOOTLOADER
/* The boot loader controls the power */
ide_power_enable(true);
// ide_power_enable(true);
#endif
or_l(0x80000000, &GPIO_OUT);
or_l(0x80000000, &GPIO_ENABLE);
or_l(0x80000000, &GPIO_FUNCTION);
#ifdef HAVE_SPDIF_POWER
spdif_power_enable(false);
#endif
#elif defined(IRIVER_H300_SERIES)
#ifdef IRIVER_H300_SERIES
pcf50606_init();
#endif
#endif
#elif CONFIG_CPU == PP5020
/* TODO: Implement power_init() */
#else

View file

@ -91,6 +91,8 @@
#define USB_IRIVERSTYLE
#define HAVE_ATA_LED_CTRL
/* Define this if you have adjustable CPU frequency */
#define HAVE_ADJUSTABLE_CPU_FREQ

View file

@ -88,6 +88,8 @@
#define USB_IRIVERSTYLE
#define HAVE_ATA_LED_CTRL
/* Define this if you have adjustable CPU frequency */
#define HAVE_ADJUSTABLE_CPU_FREQ

View file

@ -77,8 +77,10 @@ static void dma_start(const void *addr, long size)
/* Enable the FIFO and force one write to it */
IIS2CONFIG = IIS_DEFPARM(pcm_freq);
#ifdef HAVE_SPDIF_OUT
/* Also send the audio to S/PDIF */
EBU1CONFIG = EBU_DEFPARM;
#endif
DCR0 = DMA_INT | DMA_EEXT | DMA_CS | DMA_SINC | DMA_START;
}
@ -90,7 +92,9 @@ static void dma_stop(void)
DCR0 = 0;
/* Reset the FIFO */
IIS2CONFIG = IIS_RESET | IIS_DEFPARM(pcm_freq);
#ifdef HAVE_SPDIF_OUT
EBU1CONFIG = IIS_RESET;
#endif
next_start = NULL;
next_size = 0;
@ -220,7 +224,9 @@ void pcm_play_pause(bool play)
//BCR0 = next_size;
/* Enable the FIFO and force one write to it */
IIS2CONFIG = IIS_DEFPARM(pcm_freq);
#ifdef HAVE_SPDIF_OUT
EBU1CONFIG = EBU_DEFPARM;
#endif
DCR0 |= DMA_EEXT | DMA_START;
}
else if(!pcm_paused && !play)
@ -230,7 +236,9 @@ void pcm_play_pause(bool play)
/* Disable DMA peripheral request. */
DCR0 &= ~DMA_EEXT;
IIS2CONFIG = IIS_RESET | IIS_DEFPARM(pcm_freq);
#ifdef HAVE_SPDIF_OUT
EBU1CONFIG = IIS_RESET;
#endif
}
pcm_paused = !play;
}