forked from len0rd/rockbox
Cleaned up bootloader linker control file and added the H300 target
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7916 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
parent
59825952f3
commit
df0e5effc5
8 changed files with 51 additions and 34 deletions
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@ -456,7 +456,14 @@ void backlight_init(void)
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#else /* no backlight, empty dummy functions */
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#else /* no backlight, empty dummy functions */
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void backlight_init(void) {}
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void backlight_init(void)
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{
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#if defined(IRIVER_H300_SERIES) && defined(BOOTLOADER)
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or_l(0x00020000, &GPIO1_OUT);
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or_l(0x00020000, &GPIO1_ENABLE);
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or_l(0x00020000, &GPIO1_FUNCTION);
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#endif
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}
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void backlight_on(void) {}
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void backlight_on(void) {}
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void backlight_off(void) {}
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void backlight_off(void) {}
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void backlight_tick(void) {}
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void backlight_tick(void) {}
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@ -12,13 +12,7 @@ OUTPUT_FORMAT(elf32-sh)
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INPUT(crt0.o)
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INPUT(crt0.o)
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#endif
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#endif
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#if MEMORYSIZE >= 32
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#define DRAMSIZE (MEMORYSIZE * 0x100000)
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#define PLUGINSIZE 0xC0000
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#else
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#define PLUGINSIZE 0x8000
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#endif
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGINSIZE
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#ifdef IRIVER_H100_SERIES
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#ifdef IRIVER_H100_SERIES
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#define DRAMORIG 0x31000000
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#define DRAMORIG 0x31000000
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@ -26,6 +20,12 @@ INPUT(crt0.o)
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#define IRAMSIZE 0x18000
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#define IRAMSIZE 0x18000
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#define FLASHORIG 0x001f0000
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#define FLASHORIG 0x001f0000
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#define FLASHSIZE 2M
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#define FLASHSIZE 2M
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#elif defined(IRIVER_H300_SERIES)
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#define DRAMORIG 0x31000000
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#define IRAMORIG 0x10000000
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#define IRAMSIZE 0x18000
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#define FLASHORIG 0x003f0000
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#define FLASHSIZE 4M
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#elif CONFIG_CPU == PP5020
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#elif CONFIG_CPU == PP5020
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#define DRAMORIG 0x10000000
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#define DRAMORIG 0x10000000
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#define IRAMORIG 0x40000000
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#define IRAMORIG 0x40000000
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@ -40,8 +40,6 @@ INPUT(crt0.o)
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#define FLASHSIZE 256K - ROM_START
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#define FLASHSIZE 256K - ROM_START
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#endif
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#endif
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#define ENDADDR (IRAMORIG + IRAMSIZE)
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#if CONFIG_CPU!=PP5020
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#if CONFIG_CPU!=PP5020
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MEMORY
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MEMORY
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{
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{
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@ -141,29 +139,22 @@ SECTIONS
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stackend = .;
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stackend = .;
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} > IRAM
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} > IRAM
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#ifdef IRIVER_H300_SERIES
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.bss DRAMORIG+0x1000000:
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#else
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.bss :
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.bss :
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#endif
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{
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{
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_edata = .;
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_edata = .;
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*(.ibss)
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*(.ibss)
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*(.bss)
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*(.bss)
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*(COMMON)
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*(COMMON)
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_end = .;
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_end = .;
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#ifdef IRIVER_H300_SERIES
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} > DRAM
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#else
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} > IRAM
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} > IRAM
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#endif
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.mp3buf :
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{
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. = ALIGN(0x4);
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_mp3buffer = .;
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} > IRAM
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.mp3end ENDADDR:
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{
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_mp3end = .;
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} > IRAM
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.plugin ENDADDR:
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{
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_pluginbuf = .;
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}
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}
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}
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#endif
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#endif
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@ -1413,15 +1413,19 @@ int ata_init(void)
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or_b(0x02, &PADRH); /* release ATA reset */
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or_b(0x02, &PADRH); /* release ATA reset */
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PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */
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PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */
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#elif CONFIG_CPU == MCF5249
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#elif CONFIG_CPU == MCF5249
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#ifdef HAVE_ATA_LED_CTRL
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/* Enable disk LED & ISD chip power control */
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/* Enable disk LED & ISD chip power control */
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and_l(~0x0000240, &GPIO_OUT);
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and_l(~0x0000240, &GPIO_OUT);
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or_l(0x00000240, &GPIO_ENABLE);
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or_l(0x00000240, &GPIO_ENABLE);
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or_l(0x00000200, &GPIO_FUNCTION);
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or_l(0x00000200, &GPIO_FUNCTION);
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#endif
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/* ATA reset */
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/* ATA reset */
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or_l(0x00080000, &GPIO_OUT);
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and_l(~0x00080000, &GPIO_OUT);
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or_l(0x00080000, &GPIO_ENABLE);
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or_l(0x00080000, &GPIO_ENABLE);
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or_l(0x00080000, &GPIO_FUNCTION);
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or_l(0x00080000, &GPIO_FUNCTION);
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sleep(10);
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or_l(0x00080000, &GPIO_OUT);
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/* FYI: The IDECONFIGx registers are set by set_cpu_frequency() */
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/* FYI: The IDECONFIGx registers are set by set_cpu_frequency() */
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#elif CONFIG_CPU == PP5020
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#elif CONFIG_CPU == PP5020
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@ -37,6 +37,7 @@ static volatile unsigned char *i2c_get_addr(int device);
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void i2c_init(void)
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void i2c_init(void)
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{
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{
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#ifdef IRIVER_H100_SERIES
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/* The FM chip has no pullup for SCL, so we have to bit-bang the
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/* The FM chip has no pullup for SCL, so we have to bit-bang the
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I2C for that one. */
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I2C for that one. */
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or_l(0x00800000, &GPIO1_OUT);
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or_l(0x00800000, &GPIO1_OUT);
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@ -45,7 +46,7 @@ void i2c_init(void)
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or_l(0x00000008, &GPIO_ENABLE);
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or_l(0x00000008, &GPIO_ENABLE);
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or_l(0x00800000, &GPIO1_FUNCTION);
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or_l(0x00800000, &GPIO1_FUNCTION);
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or_l(0x00000008, &GPIO_FUNCTION);
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or_l(0x00000008, &GPIO_FUNCTION);
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#endif
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/* I2C Clock divisor = 576 => 119.952 MHz / 2 / 576 = 104.125 kHz */
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/* I2C Clock divisor = 576 => 119.952 MHz / 2 / 576 = 104.125 kHz */
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MFDR = 0x14;
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MFDR = 0x14;
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@ -62,23 +62,25 @@ int radio_get_status(void)
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void power_init(void)
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void power_init(void)
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{
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{
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#if CONFIG_CPU == MCF5249
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#if CONFIG_CPU == MCF5249
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#if IRIVER_H100_SERIES
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#if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300_SERIES)
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or_l(0x00080000, &GPIO1_OUT);
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// or_l(0x00080000, &GPIO1_OUT);
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or_l(0x00080000, &GPIO1_ENABLE);
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// or_l(0x00080000, &GPIO1_ENABLE);
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or_l(0x00080000, &GPIO1_FUNCTION);
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// or_l(0x00080000, &GPIO1_FUNCTION);
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#ifndef BOOTLOADER
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#ifndef BOOTLOADER
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/* The boot loader controls the power */
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/* The boot loader controls the power */
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ide_power_enable(true);
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// ide_power_enable(true);
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#endif
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#endif
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or_l(0x80000000, &GPIO_OUT);
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or_l(0x80000000, &GPIO_ENABLE);
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or_l(0x80000000, &GPIO_ENABLE);
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or_l(0x80000000, &GPIO_FUNCTION);
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or_l(0x80000000, &GPIO_FUNCTION);
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#ifdef HAVE_SPDIF_POWER
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#ifdef HAVE_SPDIF_POWER
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spdif_power_enable(false);
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spdif_power_enable(false);
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#endif
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#endif
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#elif defined(IRIVER_H300_SERIES)
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#ifdef IRIVER_H300_SERIES
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pcf50606_init();
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pcf50606_init();
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#endif
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#endif
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#endif
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#elif CONFIG_CPU == PP5020
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#elif CONFIG_CPU == PP5020
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/* TODO: Implement power_init() */
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/* TODO: Implement power_init() */
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#else
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#else
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@ -91,6 +91,8 @@
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#define USB_IRIVERSTYLE
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#define USB_IRIVERSTYLE
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#define HAVE_ATA_LED_CTRL
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/* Define this if you have adjustable CPU frequency */
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/* Define this if you have adjustable CPU frequency */
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#define HAVE_ADJUSTABLE_CPU_FREQ
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#define HAVE_ADJUSTABLE_CPU_FREQ
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@ -88,6 +88,8 @@
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#define USB_IRIVERSTYLE
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#define USB_IRIVERSTYLE
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#define HAVE_ATA_LED_CTRL
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/* Define this if you have adjustable CPU frequency */
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/* Define this if you have adjustable CPU frequency */
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#define HAVE_ADJUSTABLE_CPU_FREQ
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#define HAVE_ADJUSTABLE_CPU_FREQ
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@ -77,8 +77,10 @@ static void dma_start(const void *addr, long size)
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/* Enable the FIFO and force one write to it */
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/* Enable the FIFO and force one write to it */
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IIS2CONFIG = IIS_DEFPARM(pcm_freq);
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IIS2CONFIG = IIS_DEFPARM(pcm_freq);
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#ifdef HAVE_SPDIF_OUT
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/* Also send the audio to S/PDIF */
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/* Also send the audio to S/PDIF */
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EBU1CONFIG = EBU_DEFPARM;
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EBU1CONFIG = EBU_DEFPARM;
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#endif
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DCR0 = DMA_INT | DMA_EEXT | DMA_CS | DMA_SINC | DMA_START;
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DCR0 = DMA_INT | DMA_EEXT | DMA_CS | DMA_SINC | DMA_START;
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}
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}
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@ -90,7 +92,9 @@ static void dma_stop(void)
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DCR0 = 0;
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DCR0 = 0;
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/* Reset the FIFO */
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/* Reset the FIFO */
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IIS2CONFIG = IIS_RESET | IIS_DEFPARM(pcm_freq);
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IIS2CONFIG = IIS_RESET | IIS_DEFPARM(pcm_freq);
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#ifdef HAVE_SPDIF_OUT
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EBU1CONFIG = IIS_RESET;
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EBU1CONFIG = IIS_RESET;
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#endif
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next_start = NULL;
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next_start = NULL;
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next_size = 0;
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next_size = 0;
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@ -220,7 +224,9 @@ void pcm_play_pause(bool play)
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//BCR0 = next_size;
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//BCR0 = next_size;
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/* Enable the FIFO and force one write to it */
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/* Enable the FIFO and force one write to it */
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IIS2CONFIG = IIS_DEFPARM(pcm_freq);
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IIS2CONFIG = IIS_DEFPARM(pcm_freq);
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#ifdef HAVE_SPDIF_OUT
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EBU1CONFIG = EBU_DEFPARM;
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EBU1CONFIG = EBU_DEFPARM;
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#endif
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DCR0 |= DMA_EEXT | DMA_START;
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DCR0 |= DMA_EEXT | DMA_START;
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}
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}
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else if(!pcm_paused && !play)
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else if(!pcm_paused && !play)
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@ -230,7 +236,9 @@ void pcm_play_pause(bool play)
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/* Disable DMA peripheral request. */
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/* Disable DMA peripheral request. */
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DCR0 &= ~DMA_EEXT;
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DCR0 &= ~DMA_EEXT;
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IIS2CONFIG = IIS_RESET | IIS_DEFPARM(pcm_freq);
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IIS2CONFIG = IIS_RESET | IIS_DEFPARM(pcm_freq);
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#ifdef HAVE_SPDIF_OUT
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EBU1CONFIG = IIS_RESET;
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EBU1CONFIG = IIS_RESET;
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#endif
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}
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}
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pcm_paused = !play;
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pcm_paused = !play;
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}
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}
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