forked from len0rd/rockbox
New A/D conversion strategy, now updates all channels every tick
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5099 a1c6a512-1295-4272-9138-f99709370657
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1 changed files with 59 additions and 41 deletions
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@ -22,6 +22,27 @@
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#include "thread.h"
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#include "thread.h"
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#include "adc.h"
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#include "adc.h"
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/**************************************************************************
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** The A/D conversion is done every tick, in three steps:
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**
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** 1) On the tick interrupt, the conversion of channels 0-3 is started, and
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** the A/D interrupt is enabled.
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**
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** 2) After the conversion is done (approx. 256*4 cycles later), an interrupt
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** is generated at level 1, which is the same level as the tick interrupt
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** itself. This interrupt will be pending until the tick interrupt is
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** finished.
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** When the A/D interrupt is finally served, it will read the results
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** from the first conversion and start the conversion of channels 4-7.
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**
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** 3) When the conversion of channels 4-7 is finished, the interrupt is
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** triggered again, and the results are read. This time, no new
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** conversion is started, it will be done in the next tick interrupt.
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**
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** Thus, each channel will be updated HZ times per second.
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**
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*************************************************************************/
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static int current_channel;
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static int current_channel;
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static unsigned short adcdata[NUM_ADC_CHANNELS];
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static unsigned short adcdata[NUM_ADC_CHANNELS];
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static const unsigned int adcreg[NUM_ADC_CHANNELS] =
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static const unsigned int adcreg[NUM_ADC_CHANNELS] =
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@ -32,15 +53,39 @@ static const unsigned int adcreg[NUM_ADC_CHANNELS] =
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static void adc_tick(void)
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static void adc_tick(void)
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{
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{
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/* Read the data that has bee converted since the last tick */
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/* Start a conversion of channel group 0. This will trigger an interrupt,
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adcdata[current_channel] =
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and the interrupt handler will take care of group 1. */
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*(unsigned short *)adcreg[current_channel] >> 6;
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/* Start a conversion on the next channel */
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current_channel = 0;
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current_channel++;
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ADCSR = ADCSR_ADST | ADCSR_ADIE | ADCSR_SCAN | 3;
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if(current_channel == NUM_ADC_CHANNELS)
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}
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current_channel = 0;
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ADCSR = ADCSR_ADST | current_channel;
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#pragma interrupt
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void ADITI(void)
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{
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if(ADCSR & ADCSR_ADF)
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{
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ADCSR = 0;
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if(current_channel == 0)
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{
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adcdata[0] = ADDRA >> 6;
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adcdata[1] = ADDRB >> 6;
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adcdata[2] = ADDRC >> 6;
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adcdata[3] = ADDRD >> 6;
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current_channel = 4;
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/* Convert the next group */
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ADCSR = ADCSR_ADST | ADCSR_ADIE | ADCSR_SCAN | 7;
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}
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else
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{
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adcdata[4] = ADDRA >> 6;
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adcdata[5] = ADDRB >> 6;
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adcdata[6] = ADDRC >> 6;
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adcdata[7] = ADDRD >> 6;
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}
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}
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}
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}
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unsigned short adc_read(int channel)
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unsigned short adc_read(int channel)
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@ -48,44 +93,17 @@ unsigned short adc_read(int channel)
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return adcdata[channel];
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return adcdata[channel];
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}
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}
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/* Batch convert 4 analog channels. If lower is true, convert AN0-AN3,
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* otherwise AN4-AN7.
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*/
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static void adc_batch_convert(bool lower)
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{
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int reg = lower ? 0 : 4;
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volatile unsigned short* ANx = ((unsigned short*) ADDRAH_ADDR);
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int i;
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ADCSR = ADCSR_ADST | ADCSR_SCAN | reg | 3;
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/* Busy wait until conversion is complete. A bit ugly perhaps, but
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* we should only need to wait about 4 * 14 µs */
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while(!(ADCSR & ADCSR_ADF))
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{
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}
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/* Stop scanning */
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ADCSR = 0;
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for (i = 0; i < 4; i++)
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{
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/* Read converted values */
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adcdata[reg++] = ANx[i] >> 6;
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}
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}
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void adc_init(void)
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void adc_init(void)
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{
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{
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ADCR = 0x7f; /* No external trigger; other bits should be 1 according to the manual... */
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ADCR = 0x7f; /* No external trigger; other bits should be 1 according
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to the manual... */
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ADCSR = 0;
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current_channel = 0;
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current_channel = 0;
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/* Do a first scan to initialize all values */
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/* Enable the A/D IRQ on level 1 */
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/* AN4 to AN7 */
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IPRE = (IPRE & 0xf0ff) | 0x0100;
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adc_batch_convert(false);
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/* AN0 to AN3 */
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adc_batch_convert(true);
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tick_add_task(adc_tick);
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tick_add_task(adc_tick);
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}
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}
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