forked from len0rd/rockbox
iriver: Moved the I2C prescaler setting to i2c_init(), and removed it from set_cpu_frequency(). The Coldfire I2C controller can't handle on-the-fly prescaler changes. Also removed the unnecessary slave address setting in i2c_init.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7304 a1c6a512-1295-4272-9138-f99709370657
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5a8eac1a5a
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dc4a6b828e
2 changed files with 4 additions and 11 deletions
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@ -529,9 +529,6 @@ void set_cpu_frequency(long frequency)
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tick_start(1000/HZ);
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IDECONFIG1 = 0x106000 | (5 << 10); /* BUFEN2 enable + CS2Pre/CS2Post */
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IDECONFIG2 = 0x40000 | (1 << 8); /* TA enable + CS2wait */
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/* I2C Clock divisor = 576 => 119.952 MHz / 2 / 576 = 104.125 kHz */
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MFDR = 0x14;
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MFDR2 = 0x14;
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break;
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case CPUFREQ_NORMAL:
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@ -548,9 +545,6 @@ void set_cpu_frequency(long frequency)
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tick_start(1000/HZ);
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IDECONFIG1 = 0x106000 | (5 << 10); /* BUFEN2 enable + CS2Pre/CS2Post */
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IDECONFIG2 = 0x40000 | (0 << 8); /* TA enable + CS2wait */
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/* I2C Clock divisor = 240 => 47.9808 MHz / 2 / 240 = 99.96 kHz */
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MFDR = 0x0f;
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MFDR2 = 0x0f;
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break;
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default:
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DCR = (DCR & ~0x01ff) | 1; /* Refresh timer for bypass
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@ -562,9 +556,6 @@ void set_cpu_frequency(long frequency)
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tick_start(1000/HZ);
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IDECONFIG1 = 0x106000 | (1 << 10); /* BUFEN2 enable + CS2Pre/CS2Post */
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IDECONFIG2 = 0x40000 | (0 << 8); /* TA enable + CS2wait */
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/* I2C Clock divisor = 56 => 11.2896 MHz / 56 = 100.8 kHz */
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MFDR = 0x06;
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MFDR2 = 0x06;
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break;
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}
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}
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