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enable the RTC on the mrobe.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15279 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Jonathan Gordon 2007-10-23 14:22:44 +00:00
parent d40db1901e
commit dbff3731a5
3 changed files with 23 additions and 7 deletions
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21
firmware/drivers/rtc/rtc_rx5x348ab.c
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@ -21,15 +21,32 @@
#include "spi.h" #include "spi.h"
#include "rtc.h" #include "rtc.h"
#include <stdbool.h> #include <stdbool.h>
/* Choose one of: */
#define ADDR_READ 0x04
#define ADDR_WRITE 0x00
/* and one of: */
#define ADDR_ONE 0x08
#define ADDR_BURST 0x00
void rtc_init(void) void rtc_init(void)
{ {
} }
int rtc_read_datetime(unsigned char* buf) int rtc_read_datetime(unsigned char* buf)
{ {
char command = 0x04; /* burst read from the start of the time/date reg */ char command = ADDR_READ|ADDR_BURST; /* burst read from the start of the time/date reg */
spi_block_transfer(SPI_target_RX5X348AB, spi_block_transfer(SPI_target_RX5X348AB,
&command, 1, buf, 7); &command, 1, buf, 7);
return 1; return 1;
} }
int rtc_write_datetime(unsigned char* buf)
{
char command = ADDR_WRITE|ADDR_BURST; /* burst read from the start of the time/date reg */
char data[8];
int i;
data[0] = command;
for (i=1;i<8;i++)
data[i] = buf[i-1];
spi_block_transfer(SPI_target_RX5X348AB,
data, 8, NULL, 0);
return 1;
}

2
firmware/export/config-mrobe500.h
View file

@ -84,7 +84,7 @@
#define CONFIG_CODEC SWCODEC #define CONFIG_CODEC SWCODEC
/* define this if you have a real-time clock */ /* define this if you have a real-time clock */
//#define CONFIG_RTC RTC_RX5X348AB #define CONFIG_RTC RTC_RX5X348AB
/* Define this for LCD backlight available */ /* Define this for LCD backlight available */
#define HAVE_BACKLIGHT #define HAVE_BACKLIGHT

5
firmware/target/arm/tms320dm320/spi-dm320.c
View file

@ -92,9 +92,8 @@ int spi_block_transfer(enum SPI_target target,
void spi_init(void) void spi_init(void)
{ {
spinlock_init(&spi_lock); spinlock_init(&spi_lock);
/* Set SCLK idle level = 0 */ /* Set SCLK idle level = 1 */
IO_SERIAL0_MODE |= (1<<10); IO_SERIAL0_MODE &= ~(1<<10);
/* Enable TX */ /* Enable TX */
IO_SERIAL0_TX_ENABLE = 0x0001; IO_SERIAL0_TX_ENABLE = 0x0001;