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Coldfire: Fix the modification of IMR. Interrupts must be masked at the core level at at least the level of the interrupt being masked. Not following the datasheet and relying strictly on and/or_l causes unhandled 'Levelx' exceptions (showing itself quite often in PCM mixer work which more greatly stresses PCM lockout).

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30009 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2011-06-17 03:09:47 +00:00
parent 7b605f0416
commit d4800fa385
7 changed files with 33 additions and 18 deletions

View file

@ -89,7 +89,7 @@ bool timer_set(long cycles, bool start)
bool timer_start(void)
{
ICR2 = 0x90; /* interrupt on level 4.0 */
and_l(~(1<<10), &IMR);
coldfire_imr_mod(0, 1 << 10);
TMR1 |= 1; /* start timer */
return true;
}
@ -97,7 +97,7 @@ bool timer_start(void)
void timer_stop(void)
{
TMR1 = 0; /* disable timer 1 */
or_l((1<<10), &IMR); /* disable interrupt */
coldfire_imr_mod(1 << 10, 1 << 10); /* disable interrupt */
}
void timers_adjust_prescale(int multiplier, bool enable_irq)