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S5L870x is fast enough to play spc with gaussian interpolation and echo processing.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29914 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Andree Buschmann 2011-05-22 20:01:07 +00:00
parent 6117ffdde5
commit d038f89f3f
2 changed files with 2 additions and 1 deletions
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1
apps/codecs/libspc/spc_codec.h
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@ -51,6 +51,7 @@
/* Only some targets are fast enough for gaussian and realtime BRR decode */ /* Only some targets are fast enough for gaussian and realtime BRR decode */
#if CONFIG_CPU == S3C2440 || CONFIG_CPU == IMX31L || \ #if CONFIG_CPU == S3C2440 || CONFIG_CPU == IMX31L || \
CONFIG_CPU == AS3525 || CONFIG_CPU == AS3525v2 || \ CONFIG_CPU == AS3525 || CONFIG_CPU == AS3525v2 || \
defined(CPU_S5L870X) || \
(CONFIG_PLATFORM & PLATFORM_HOSTED) || MEMORYSIZE <= 2 (CONFIG_PLATFORM & PLATFORM_HOSTED) || MEMORYSIZE <= 2
/* Don't cache BRR waves */ /* Don't cache BRR waves */
#define SPC_BRRCACHE 0 #define SPC_BRRCACHE 0

2
apps/codecs/libspc/spc_dsp.c
View file

@ -766,7 +766,7 @@ void DSP_run_( struct Spc_Dsp* this, long count, int32_t* out_buf )
#if !SPC_NOINTERP #if !SPC_NOINTERP
/* Interleved gauss table (to improve cache coherency). */ /* Interleved gauss table (to improve cache coherency). */
/* gauss [i * 2 + j] = normal_gauss [(1 - j) * 256 + i] */ /* gauss [i * 2 + j] = normal_gauss [(1 - j) * 256 + i] */
static short const gauss [512] ICONST_ATTR_SPC = static short const gauss [512] ICONST_ATTR_SPC MEM_ALIGN_ATTR =
{ {
370,1305, 366,1305, 362,1304, 358,1304, 354,1304, 351,1304, 347,1304, 343,1303, 370,1305, 366,1305, 362,1304, 358,1304, 354,1304, 351,1304, 347,1304, 343,1303,
339,1303, 336,1303, 332,1302, 328,1302, 325,1301, 321,1300, 318,1300, 314,1299, 339,1303, 336,1303, 332,1302, 328,1302, 325,1301, 321,1300, 318,1300, 314,1299,