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x1000: add NAND OTP access switch

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Provide a way to toggle the OTP bit for reading OTP pages, mostly
useful for debug purposes.

Change-Id: Iec697de2dc188588c43d9ed466201971cac8f30c
This commit is contained in:
Aidan MacDonald 2022-06-07 21:07:49 +01:00
parent 45e2d5d641
commit c72f9c6d0f
2 changed files with 9 additions and 0 deletions
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6
firmware/target/mips/ingenic_x1000/nand-x1000.c
View file

@ -216,6 +216,12 @@ void nand_close(struct nand_drv* drv)
sfc_close(); sfc_close();
} }
void nand_enable_otp(struct nand_drv* drv, bool enable)
{
nand_upd_reg(drv, FREG_CFG, FREG_CFG_OTP_ENABLE,
enable ? FREG_CFG_OTP_ENABLE : 0);
}
static uint8_t nand_wait_busy(struct nand_drv* drv) static uint8_t nand_wait_busy(struct nand_drv* drv)
{ {
uint8_t reg; uint8_t reg;

3
firmware/target/mips/ingenic_x1000/nand-x1000.h
View file

@ -211,6 +211,9 @@ static inline void nand_unlock(struct nand_drv* drv)
extern int nand_open(struct nand_drv* drv); extern int nand_open(struct nand_drv* drv);
extern void nand_close(struct nand_drv* drv); extern void nand_close(struct nand_drv* drv);
/* Enable/disable OTP access. OTP data pages are usually vendor-specific. */
void nand_enable_otp(struct nand_drv* drv, bool enable);
/* Read / program / erase operations. Buffer needs to be cache-aligned for DMA. /* Read / program / erase operations. Buffer needs to be cache-aligned for DMA.
* Read and program operate on full page data, ie. including OOB data areas. * Read and program operate on full page data, ie. including OOB data areas.
* *