forked from len0rd/rockbox
Jz4740:
* Optimize & cleanup thread handling a bit * Unify exception return and fix a potential bug git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20659 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Maurus Cuelenaere
parent
87efb79682
commit
c606fd04c8
2 changed files with 50 additions and 101 deletions
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@ -216,10 +216,10 @@ _init_stack_loop:
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.section .vectors, "ax", %progbits
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.section .vectors, "ax", %progbits
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real_exception_handler:
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real_exception_handler:
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addiu sp, -0x80
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addiu sp, -0x80
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sw ra, 0(sp)
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sw ra, 0(sp)
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sw fp, 4(sp)
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sw fp, 4(sp)
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sw gp, 8(sp)
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sw gp, 8(sp)
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sw t9, 0xC(sp)
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sw t9, 0xC(sp)
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sw t8, 0x10(sp)
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sw t8, 0x10(sp)
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sw s7, 0x14(sp)
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sw s7, 0x14(sp)
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sw s6, 0x18(sp)
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sw s6, 0x18(sp)
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@ -274,60 +274,10 @@ real_exception_handler:
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_int:
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_int:
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jal intr_handler
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jal intr_handler
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nop
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nop
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lw ra, 0(sp)
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j _exception_return
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lw fp, 4(sp)
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sw gp, 8(sp)
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lw t9, 0xC(sp)
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lw t8, 0x10(sp)
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lw s7, 0x14(sp)
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lw s6, 0x18(sp)
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lw s5, 0x1C(sp)
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lw s4, 0x20(sp)
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lw s3, 0x24(sp)
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lw s2, 0x28(sp)
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lw s1, 0x2C(sp)
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lw s0, 0x30(sp)
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lw t7, 0x34(sp)
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lw t6, 0x38(sp)
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lw t5, 0x3C(sp)
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lw t4, 0x40(sp)
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lw t3, 0x44(sp)
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lw t2, 0x48(sp)
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lw t1, 0x4C(sp)
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lw t0, 0x50(sp)
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lw a3, 0x54(sp)
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lw a2, 0x58(sp)
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lw a1, 0x5C(sp)
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lw a0, 0x60(sp)
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lw v1, 0x64(sp)
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lw v0, 0x68(sp)
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lw $1, 0x6C(sp)
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lw k0, 0x70(sp)
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mtlo k0
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nop
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lw k0, 0x74(sp)
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mthi k0
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nop
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lw k0, 0x78(sp)
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nop
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mtc0 k0, C0_STATUS # Status register
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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lw k0, 0x7C(sp)
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nop
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mtc0 k0, C0_EPC # Exception Program Counter
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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addiu sp, 0x80
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eret # Exception Return
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nop
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_exception:
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_exception:
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add a0, sp, $0
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move a0, sp
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mfc0 a1, C0_CAUSE # C0_CAUSE of last exception
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mfc0 a1, C0_CAUSE # C0_CAUSE of last exception
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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@ -340,10 +290,12 @@ _exception:
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sll zero, 1
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sll zero, 1
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jal exception_handler
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jal exception_handler
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nop
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nop
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lw ra, 0(sp)
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lw fp, 4(sp)
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_exception_return:
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sw gp, 8(sp)
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lw ra, 0(sp)
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lw t9, 0xC(sp)
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lw fp, 4(sp)
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lw gp, 8(sp)
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lw t9, 0xC(sp)
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lw t8, 0x10(sp)
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lw t8, 0x10(sp)
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lw s7, 0x14(sp)
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lw s7, 0x14(sp)
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lw s6, 0x18(sp)
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lw s6, 0x18(sp)
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@ -375,15 +327,15 @@ _exception:
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mthi k0
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mthi k0
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nop
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nop
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lw k0, 0x78(sp)
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lw k0, 0x78(sp)
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nop
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mtc0 k0, C0_STATUS # Status register
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mtc0 k0, C0_STATUS # Status register
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nop
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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lw k0, 0x7C(sp)
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lw k0, 0x7C(sp)
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nop
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mtc0 k0, C0_EPC # Exception Program Counter
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mtc0 k0, C0_EPC # Exception Program Counter
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nop
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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sll zero, 1
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@ -937,23 +937,23 @@ static inline void core_sleep(void)
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void start_thread(void); /* Provide C access to ASM label */
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void start_thread(void); /* Provide C access to ASM label */
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static void __attribute__((used)) _start_thread(void)
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static void __attribute__((used)) _start_thread(void)
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{
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{
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/* $t1 = context */
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/* t1 = context */
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asm volatile (
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asm volatile (
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"start_thread: \n"
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"start_thread: \n"
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".set noreorder \n"
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".set noreorder \n"
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".set noat \n"
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".set noat \n"
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"lw $8, 4($9) \n" /* Fetch thread function pointer ($8 = $t0, $9 = $t1) */
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"lw $8, 4($9) \n" /* Fetch thread function pointer ($8 = t0, $9 = t1) */
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"lw $29, 40($9) \n" /* Set initial sp(=$29) */
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"lw $29, 40($9) \n" /* Set initial sp(=$29) */
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"jalr $8 \n" /* Start the thread */
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"sw $0, 48($9) \n" /* Clear start address */
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"sw $0, 48($9) \n" /* Clear start address */
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"jr $8 \n" /* Start the thread */
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"nop \n"
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".set at \n"
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".set at \n"
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".set reorder \n"
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".set reorder \n"
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::: "t0"
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);
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);
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thread_exit();
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thread_exit();
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}
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}
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/* Place context pointer in $s0 slot, function pointer in $s1 slot, and
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/* Place context pointer in s0 slot, function pointer in s1 slot, and
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* start_thread pointer in context_start */
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* start_thread pointer in context_start */
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#define THREAD_STARTUP_INIT(core, thread, function) \
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#define THREAD_STARTUP_INIT(core, thread, function) \
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({ (thread)->context.r[0] = (uint32_t)&(thread)->context, \
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({ (thread)->context.r[0] = (uint32_t)&(thread)->context, \
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@ -969,22 +969,21 @@ static inline void store_context(void* addr)
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asm volatile (
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asm volatile (
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".set noreorder \n"
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".set noreorder \n"
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".set noat \n"
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".set noat \n"
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"move $8, %0 \n"
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"sw $16, 0(%0) \n" /* s0 */
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"sw $16, 0($8) \n" /* $s0 */
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"sw $17, 4(%0) \n" /* s1 */
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"sw $17, 4($8) \n" /* $s1 */
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"sw $18, 8(%0) \n" /* s2 */
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"sw $18, 8($8) \n" /* $s2 */
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"sw $19, 12(%0) \n" /* s3 */
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"sw $19, 12($8) \n" /* $s3 */
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"sw $20, 16(%0) \n" /* s4 */
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"sw $20, 16($8) \n" /* $s4 */
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"sw $21, 20(%0) \n" /* s5 */
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"sw $21, 20($8) \n" /* $s5 */
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"sw $22, 24(%0) \n" /* s6 */
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"sw $22, 24($8) \n" /* $s6 */
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"sw $23, 28(%0) \n" /* s7 */
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"sw $23, 28($8) \n" /* $s7 */
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"sw $28, 32(%0) \n" /* gp */
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"sw $28, 32($8) \n" /* gp */
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"sw $30, 36(%0) \n" /* fp */
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"sw $30, 36($8) \n" /* fp */
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"sw $29, 40(%0) \n" /* sp */
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"sw $29, 40($8) \n" /* sp */
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"sw $31, 44(%0) \n" /* ra */
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"sw $31, 44($8) \n" /* ra */
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".set at \n"
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".set at \n"
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".set reorder \n"
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".set reorder \n"
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: : "r" (addr) : "t0"
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: : "r" (addr)
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);
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);
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}
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}
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@ -997,29 +996,27 @@ static inline void load_context(const void* addr)
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asm volatile (
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asm volatile (
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".set noat \n"
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".set noat \n"
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".set noreorder \n"
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".set noreorder \n"
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"lw $8, 48(%0) \n" /* Get start address ($8 = $t0) */
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"lw $8, 48(%0) \n" /* Get start address ($8 = t0) */
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"beqz $8, running \n" /* NULL -> already running */
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"beqz $8, running \n" /* NULL -> already running */
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"nop \n"
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"nop \n"
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"move $9, %0 \n" /* $t1 = context */
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"jr $8 \n"
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"jr $8 \n"
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"nop \n"
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"move $9, %0 \n" /* t1 = context */
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"running: \n"
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"running: \n"
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"move $8, %0 \n"
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"lw $16, 0(%0) \n" /* s0 */
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"lw $16, 0($8) \n" /* $s0 */
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"lw $17, 4(%0) \n" /* s1 */
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"lw $17, 4($8) \n" /* $s1 */
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"lw $18, 8(%0) \n" /* s2 */
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"lw $18, 8($8) \n" /* $s2 */
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"lw $19, 12(%0) \n" /* s3 */
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"lw $19, 12($8) \n" /* $s3 */
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"lw $20, 16(%0) \n" /* s4 */
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"lw $20, 16($8) \n" /* $s4 */
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"lw $21, 20(%0) \n" /* s5 */
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"lw $21, 20($8) \n" /* $s5 */
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"lw $22, 24(%0) \n" /* s6 */
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"lw $22, 24($8) \n" /* $s6 */
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"lw $23, 28(%0) \n" /* s7 */
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"lw $23, 28($8) \n" /* $s7 */
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"lw $28, 32(%0) \n" /* gp */
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"lw $28, 32($8) \n" /* gp */
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"lw $30, 36(%0) \n" /* fp */
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"lw $30, 36($8) \n" /* fp */
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"lw $29, 40(%0) \n" /* sp */
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"lw $29, 40($8) \n" /* sp */
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"lw $31, 44(%0) \n" /* ra */
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"lw $31, 44($8) \n" /* ra */
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".set at \n"
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".set at \n"
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".set reorder \n"
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".set reorder \n"
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: : "r" (addr) : "t0" /* only! */
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: : "r" (addr) : "t0", "t1"
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);
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);
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}
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}
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@ -1033,9 +1030,9 @@ static inline void core_sleep(void)
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__cpm_idle_mode();
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__cpm_idle_mode();
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#endif
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#endif
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asm volatile(".set mips32r2 \n"
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asm volatile(".set mips32r2 \n"
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"mfc0 $8, $12 \n" /* mfc $t0, $12 */
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"mfc0 $8, $12 \n" /* mfc t0, $12 */
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"move $9, $8 \n" /* move $t1, $t0 */
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"move $9, $8 \n" /* move t1, t0 */
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"la $10, 0x8000000 \n" /* la $t2, 0x8000000 */
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"la $10, 0x8000000 \n" /* la t2, 0x8000000 */
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"or $8, $8, $10 \n" /* Enable reduced power mode */
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"or $8, $8, $10 \n" /* Enable reduced power mode */
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"mtc0 $8, $12 \n"
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"mtc0 $8, $12 \n"
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"wait \n"
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"wait \n"
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