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FS#7182: Second attempt by Dave Chapman at getting ARM disassembler to compile in Linux. This version produces identical output to the Windows version.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14128 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Barry Wardell 2007-08-01 22:19:22 +00:00
parent 0b8dd125c3
commit c5b5220595
2 changed files with 12 additions and 9 deletions
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13
utils/disassembler/arm/disasm_arm.c
View file

@ -2,8 +2,8 @@
#include <string.h> #include <string.h>
#include <stdint.h> #include <stdint.h>
#define ULONG unsigned long #define ULONG uint32_t
#define UCHAR unsigned char #define UCHAR uint8_t
#define FRMT "0x%x" // "0x%x" #define FRMT "0x%x" // "0x%x"
#define SHFTFRMC "%s %s #%d" // "%s %s %d" #define SHFTFRMC "%s %s #%d" // "%s %s %d"
@ -162,7 +162,7 @@ void halfword_stg(char *stg, ULONG val)
void branch_stg(char *stg, ULONG val, ULONG pos) void branch_stg(char *stg, ULONG val, ULONG pos)
{ {
ULONG off = pos + ((int)val*256) / 64 + 8; ULONG off = pos + (((int32_t)val << 8) >> 6) + 8;
if((val & 0x0ffffff0) == 0x012fff10) // bx instruction if((val & 0x0ffffff0) == 0x012fff10) // bx instruction
{ sprintf(stg+strlen(stg), "bx%s %s", cond[val>>28], regs[val&15]); } { sprintf(stg+strlen(stg), "bx%s %s", cond[val>>28], regs[val&15]); }
@ -226,7 +226,7 @@ void opcode_stg(char *stg, ULONG val, ULONG off)
{ sprintf(st, "msr%s %s, %s", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR", regs[val&15]); } { sprintf(st, "msr%s %s, %s", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR", regs[val&15]); }
else else
if((((val>>23) & 31) == 6) && ((val & 0x30f000) == 0x20f000)) if((((val>>23) & 31) == 6) && ((val & 0x30f000) == 0x20f000))
{ sprintf(st, "msr%s %s, 0x%x", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR_cf", op2); } { sprintf(st, "msr%s %s, %s", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR_cf", op2); }
else else
if((((val>>23) & 31) == 2) && ((val & 0x300ff0) == 0x000090)) if((((val>>23) & 31) == 2) && ((val & 0x300ff0) == 0x000090))
{ sprintf(st, "swp%s%s %s, %s, [%s]", val&0x400000?"b":"", cnd1[val>>28], regs[(val>>12)&15], regs[val&15], regs[(val>>16)&15]); } { sprintf(st, "swp%s%s %s, %s, [%s]", val&0x400000?"b":"", cnd1[val>>28], regs[(val>>12)&15], regs[val&15], regs[(val>>16)&15]); }
@ -254,14 +254,15 @@ void single_data(char *stg, ULONG val)
if(val & 0x100000) sprintf(stg+strlen(stg), "ldr%s ", cnd1[val>>28]); if(val & 0x100000) sprintf(stg+strlen(stg), "ldr%s ", cnd1[val>>28]);
else sprintf(stg+strlen(stg), "str%s ", cnd1[val>>28]); else sprintf(stg+strlen(stg), "str%s ", cnd1[val>>28]);
if(val & 0x2000000) // reg offset if(val & 0x2000000) {// reg offset
if(val & 16) // shift type if(val & 16) // shift type
sprintf(op2, "error: reg defined shift"); sprintf(op2, "error: reg defined shift");
else else
if((val>>7) & 31) if((val>>7) & 31)
sprintf(op2, SHFTFRMC, regs[val&15], shfts[(val>>5)&3], (val>>7) & 31); sprintf(op2, SHFTFRMC, regs[val&15], shfts[(val>>5)&3], (val>>7) & 31);
else else
sprintf(op2, "%s", regs[val&15]); sprintf(op2, "%s", regs[val&15]);
}
if(val & 0x2000000) // reg offset if(val & 0x2000000) // reg offset
if(val & 0x1000000) // pre index if(val & 0x1000000) // pre index

8
utils/disassembler/arm/main.c
View file

@ -1,10 +1,11 @@
#include <stdio.h> #include <stdio.h>
#include <string.h> #include <string.h>
#include <stdlib.h> #include <stdlib.h>
#include <stdint.h>
#define ULONG unsigned long #define ULONG uint32_t
#define USHORT unsigned short #define USHORT uint16_t
#define UCHAR unsigned char #define UCHAR uint8_t
ULONG isdata[1000000]; /* each bit defines one byte as: code=0, data=1 */ ULONG isdata[1000000]; /* each bit defines one byte as: code=0, data=1 */
@ -115,4 +116,5 @@ int main(int argc, char **argv)
} }
fclose(in); fclose(in);
return 0;
} }