forked from len0rd/rockbox
Patch #5740 by Mike Sevakis - X5 LCD performance enhancements
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@10390 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
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8630f072e9
commit
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1 changed files with 320 additions and 170 deletions
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@ -30,72 +30,59 @@
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#include "font.h"
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#include "bidi.h"
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static bool display_on=false; /* is the display turned on? */
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/* Is the display turned on? */
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static bool display_on = false;
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/* Amount of vertical offset. Used for offset correction when flipped. */
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static int y_offset = 0;
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/* Amount of roll offset (0-127). */
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static int roll_offset = 0;
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/* A15(0x8000) && CS1->CS, A1(0x0002)->RS */
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#define LCD_CMD *(volatile unsigned short *)0xf0008000
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#define LCD_DATA *(volatile unsigned short *)0xf0008002
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/* register defines for the Renesas HD66773R */
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#define R_START_OSC 0x00
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#define R_DEVICE_CODE_READ 0x00
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#define R_DRV_OUTPUT_CONTROL 0x01
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#define R_DRV_AC_CONTROL 0x02
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#define R_POWER_CONTROL1 0x03
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#define R_POWER_CONTROL2 0x04
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#define R_ENTRY_MODE 0x05
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#define R_COMPARE_REG 0x06
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#define R_DISP_CONTROL 0x07
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#define R_FRAME_CYCLE_CONTROL 0x0b
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#define R_POWER_CONTROL3 0x0c
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#define R_POWER_CONTROL4 0x0d
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#define R_POWER_CONTROL5 0x0e
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#define R_GATE_SCAN_START_POS 0x0f
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#define R_VERT_SCROLL_CONTROL 0x11
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#define R_1ST_SCR_DRV_POS 0x14
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#define R_2ND_SCR_DRV_POS 0x15
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#define R_HORIZ_RAM_ADDR_POS 0x16
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#define R_VERT_RAM_ADDR_POS 0x17
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#define R_RAM_WRITE_DATA_MASK 0x20
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#define R_RAM_ADDR_SET 0x21
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#define R_WRITE_DATA_2_GRAM 0x22
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/*****************************************************
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The table below was generated by the following script:
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#!/usr/bin/perl
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# high byte table
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print "short high8to9[] = {\n";
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$str = " ";
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for my $m (0 .. 255) {
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# RRRRRGGG => RRRRR0GGG
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my $v = (($m & 0xF8) << 1) | ($m & 0x07);
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if(length($str) > 75) {
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print "$str\n";
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$str=" ";
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}
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$str .= sprintf("0x%03x, ", $v);
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}
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print "$str\n};\n";
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*****************************************************/
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/* Lookup table for 16->18bit conversion, high byte. The low byte is just
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shifted. */
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const short high8to9[] ICONST_ATTR = {
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0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 0x010, 0x011, 0x012,
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0x013, 0x014, 0x015, 0x016, 0x017, 0x020, 0x021, 0x022, 0x023, 0x024, 0x025,
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0x026, 0x027, 0x030, 0x031, 0x032, 0x033, 0x034, 0x035, 0x036, 0x037, 0x040,
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0x041, 0x042, 0x043, 0x044, 0x045, 0x046, 0x047, 0x050, 0x051, 0x052, 0x053,
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0x054, 0x055, 0x056, 0x057, 0x060, 0x061, 0x062, 0x063, 0x064, 0x065, 0x066,
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0x067, 0x070, 0x071, 0x072, 0x073, 0x074, 0x075, 0x076, 0x077, 0x080, 0x081,
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0x082, 0x083, 0x084, 0x085, 0x086, 0x087, 0x090, 0x091, 0x092, 0x093, 0x094,
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0x095, 0x096, 0x097, 0x0a0, 0x0a1, 0x0a2, 0x0a3, 0x0a4, 0x0a5, 0x0a6, 0x0a7,
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0x0b0, 0x0b1, 0x0b2, 0x0b3, 0x0b4, 0x0b5, 0x0b6, 0x0b7, 0x0c0, 0x0c1, 0x0c2,
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0x0c3, 0x0c4, 0x0c5, 0x0c6, 0x0c7, 0x0d0, 0x0d1, 0x0d2, 0x0d3, 0x0d4, 0x0d5,
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0x0d6, 0x0d7, 0x0e0, 0x0e1, 0x0e2, 0x0e3, 0x0e4, 0x0e5, 0x0e6, 0x0e7, 0x0f0,
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0x0f1, 0x0f2, 0x0f3, 0x0f4, 0x0f5, 0x0f6, 0x0f7, 0x100, 0x101, 0x102, 0x103,
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0x104, 0x105, 0x106, 0x107, 0x110, 0x111, 0x112, 0x113, 0x114, 0x115, 0x116,
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0x117, 0x120, 0x121, 0x122, 0x123, 0x124, 0x125, 0x126, 0x127, 0x130, 0x131,
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0x132, 0x133, 0x134, 0x135, 0x136, 0x137, 0x140, 0x141, 0x142, 0x143, 0x144,
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0x145, 0x146, 0x147, 0x150, 0x151, 0x152, 0x153, 0x154, 0x155, 0x156, 0x157,
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0x160, 0x161, 0x162, 0x163, 0x164, 0x165, 0x166, 0x167, 0x170, 0x171, 0x172,
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0x173, 0x174, 0x175, 0x176, 0x177, 0x180, 0x181, 0x182, 0x183, 0x184, 0x185,
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0x186, 0x187, 0x190, 0x191, 0x192, 0x193, 0x194, 0x195, 0x196, 0x197, 0x1a0,
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0x1a1, 0x1a2, 0x1a3, 0x1a4, 0x1a5, 0x1a6, 0x1a7, 0x1b0, 0x1b1, 0x1b2, 0x1b3,
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0x1b4, 0x1b5, 0x1b6, 0x1b7, 0x1c0, 0x1c1, 0x1c2, 0x1c3, 0x1c4, 0x1c5, 0x1c6,
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0x1c7, 0x1d0, 0x1d1, 0x1d2, 0x1d3, 0x1d4, 0x1d5, 0x1d6, 0x1d7, 0x1e0, 0x1e1,
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0x1e2, 0x1e3, 0x1e4, 0x1e5, 0x1e6, 0x1e7, 0x1f0, 0x1f1, 0x1f2, 0x1f3, 0x1f4,
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0x1f5, 0x1f6, 0x1f7,
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};
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#define R_RAM_READ_DATA 0x22
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#define R_GAMMA_FINE_ADJ_POS1 0x30
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#define R_GAMMA_FINE_ADJ_POS2 0x31
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#define R_GAMMA_FINE_ADJ_POS3 0x32
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#define R_GAMMA_GRAD_ADJ_POS 0x33
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#define R_GAMMA_FINE_ADJ_NEG1 0x34
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#define R_GAMMA_FINE_ADJ_NEG2 0x35
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#define R_GAMMA_FINE_ADJ_NEG3 0x36
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#define R_GAMMA_GRAD_ADJ_NEG 0x37
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#define R_GAMMA_AMP_ADJ_POS 0x3a
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#define R_GAMMA_AMP_ADJ_NEG 0x3b
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/* called very frequently - inline! */
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inline void lcd_write_reg(int reg, int val)
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{
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LCD_CMD = (reg >> 8) << 1;
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LCD_CMD = (reg & 0xff) << 1;
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LCD_CMD = 0x0000; /* MSB is ~always~ 0 */
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LCD_CMD = reg << 1;
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LCD_DATA = (val >> 8) << 1;
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LCD_DATA = (val & 0xff) << 1;
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}
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@ -103,36 +90,27 @@ inline void lcd_write_reg(int reg, int val)
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/* called very frequently - inline! */
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inline void lcd_begin_write_gram(void)
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{
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LCD_CMD = (R_WRITE_DATA_2_GRAM >> 8) << 1;
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LCD_CMD = (R_WRITE_DATA_2_GRAM & 0xff) << 1;
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LCD_CMD = 0x0000;
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LCD_CMD = R_WRITE_DATA_2_GRAM << 1;
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}
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/* called very frequently - inline! */
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inline void lcd_write_data(const unsigned short* p_bytes, int count) ICODE_ATTR;
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inline void lcd_write_data(const unsigned short* p_bytes, int count)
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static inline void lcd_write_one(unsigned short px)
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{
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unsigned int tmp;
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unsigned int *ptr = (unsigned int *)p_bytes;
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bool extra;
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/* if there's on odd number of pixels, remmber this and output the
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trailing pixel after the loop */
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extra = (count&1)?true:false;
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count >>= 1;
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while(count--) {
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tmp = *ptr++;
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LCD_DATA = high8to9[tmp >> 24];
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LCD_DATA = tmp>>15;
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LCD_DATA = high8to9[(tmp >> 8)&255];
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LCD_DATA = tmp<<1;
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}
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if(extra) {
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/* the final "spare" pixel */
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unsigned short read = *(unsigned short *)ptr;
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LCD_DATA = high8to9[read >> 8];
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LCD_DATA = read<<1;
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unsigned short pxsr = px >> 8;
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LCD_DATA = pxsr + (pxsr & 0x1F8);
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LCD_DATA = px << 1;
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}
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/* Write two pixels to gram from a long */
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/* called very frequently - inline! */
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static inline void lcd_write_two(unsigned long px2)
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{
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unsigned short px2sr = px2 >> 24;
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LCD_DATA = px2sr + (px2sr & 0x1F8);
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LCD_DATA = px2 >> 15;
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px2sr = px2 >> 8;
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LCD_DATA = px2sr + (px2sr & 0x1F8);
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LCD_DATA = px2 << 1;
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}
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/*** hardware configuration ***/
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@ -152,18 +130,26 @@ void lcd_set_contrast(int val)
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else if (val > 30)
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val = 30;
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lcd_write_reg(0x0e, 0x2018 + (val << 8));
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lcd_write_reg(R_POWER_CONTROL5, 0x2018 + (val << 8));
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}
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void lcd_set_invert_display(bool yesno)
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{
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(void)yesno;
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/* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=1, REV=x, D1-0=11 */
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lcd_write_reg(R_DISP_CONTROL, yesno ? 0x0033 : 0x0037);
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}
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/* turn the display upside down (call lcd_update() afterwards) */
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void lcd_set_flip(bool yesno)
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{
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(void)yesno;
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y_offset = yesno ? 4 : 0;
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/* SCN4-0=000x0 (G160) */
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lcd_write_reg(R_GATE_SCAN_START_POS, yesno ? 0x0000 : 0x0002);
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/* SM=0, GS=x, SS=x, NL4-0=10011 (G1-G160)*/
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lcd_write_reg(R_DRV_OUTPUT_CONTROL, yesno ? 0x0013 : 0x0313);
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/* Vertical stripe */
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/* HEA7-0=0xxx, HSA7-0=0xxx */
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lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0x7f00 + (y_offset << 8) + y_offset);
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}
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/* Rolls up the lcd display by the specified amount of lines.
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* remapping only and all operations on the lcd are affected.
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* ->
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* @param int lines - The number of lines that are rolled.
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* The value must be 0 <= pixels < LCD_HEIGHT. */
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* The value must be 0 <= pixels < LCD_HEIGHT.
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* Call lcd_update() afterwards */
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void lcd_roll(int lines)
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{
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(void)lines;
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/* Just allow any value mod LCD_HEIGHT-1. Assumes LCD_HEIGHT == 128. */
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if (lines < 0)
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lines = -lines & 127;
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else
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lines = (128 - (lines & 127)) & 127;
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roll_offset = lines;
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}
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/* LCD init
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* These settings are taken from the original X5 firmware
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*/
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/* LCD init */
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void lcd_init_device(void)
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{
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display_on=true;
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/* LCD Reset */
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and_l(~0x00000010, &GPIO1_OUT);
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or_l(0x00000010, &GPIO1_ENABLE);
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sleep(HZ/100);
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lcd_write_reg(0, 0x0001);
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/** Power ON Sequence **/
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/* Per datasheet Rev.1.10, Jun.21.2003, p. 99 */
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lcd_write_reg(R_START_OSC, 0x0001); /* Start Oscillation */
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/* 10ms or more for oscillation circuit to stabilize */
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sleep(HZ/50);
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/* Instruction (1) for power setting; VC2-0, VRH3-0, CAD,
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VRL3-0, VCM4-0, VDV4-0 */
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/* VC2-0=001 */
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lcd_write_reg(R_POWER_CONTROL3, 0x0001);
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/* VRL3-0=0100, PON=0, VRH3-0=0001 */
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lcd_write_reg(R_POWER_CONTROL4, 0x0401);
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/* CAD=1 */
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lcd_write_reg(R_POWER_CONTROL2, 0x8000);
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/* VCOMG=0, VDV4-0=10011 (19), VCM4-0=11000 */
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lcd_write_reg(R_POWER_CONTROL5, 0x1318);
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/* Instruction (2) for power setting; BT2-0, DC2-0, AP2-0 */
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/* BT2-0=000, DC2-0=001, AP2-0=011, SLP=0, STB=0 */
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lcd_write_reg(R_POWER_CONTROL1, 0x002c);
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/* Instruction (3) for power setting; VCOMG = "1" */
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/* VCOMG=1, VDV4-0=10011 (19), VCM4-0=11000 */
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lcd_write_reg(R_POWER_CONTROL5, 0x3318);
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lcd_write_reg(0x0d, 0x0401);
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lcd_write_reg(0x0e, 0x321e);
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lcd_write_reg(0x01, 0x0313);
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lcd_write_reg(0x02, 0x0700);
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lcd_write_reg(0x05, 0x9038);
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lcd_write_reg(0x06, 0x0000);
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lcd_write_reg(0x0b, 0x4000);
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sleep(HZ/100);
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lcd_write_reg(0x21,0x0000);
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lcd_write_reg(0x30,0x0003);
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lcd_write_reg(0x31,0x0400);
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lcd_write_reg(0x32,0x0407);
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lcd_write_reg(0x33,0x0305);
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lcd_write_reg(0x34,0x0003);
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lcd_write_reg(0x35,0x0704);
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lcd_write_reg(0x36,0x0407);
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lcd_write_reg(0x37,0x0503);
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lcd_write_reg(0x0f,0x0002);
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lcd_write_reg(0x11,0x0000);
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lcd_write_reg(0x14,0x9f00);
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lcd_write_reg(0x15,0x5c00);
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lcd_write_reg(0x16,0x7f00);
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lcd_write_reg(0x17,0x9f00);
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lcd_write_reg(0x3a,0x1409);
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lcd_write_reg(0x3b,0x0602);
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lcd_write_reg(0x0c,0x0001);
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/* 40ms or more; time for step-up circuits 1,2 to stabilize */
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sleep(HZ/25);
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lcd_write_reg(0x03,0x002c);
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lcd_write_reg(0x04,0x8000);
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/* Instruction (4) for power setting; PON = "1" */
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/* VRL3-0=0100, PON=1, VRH3-0=0001 */
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lcd_write_reg(R_POWER_CONTROL4, 0x0411);
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/* 40ms or more; time for step-up circuit 4 to stabilize */
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sleep(HZ/25);
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lcd_write_reg(0x0e,0x3318);
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/* Instructions for other mode settings (in register order). */
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/* SM=0, GS=1, SS=1, NL4-0=10011 (G1-G160)*/
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lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x313);
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/* FLD1-0=01 (1 field), B/C=1, EOR=1 (C-pat), NW5-0=000000 (1 row) */
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lcd_write_reg(R_DRV_AC_CONTROL, 0x0700);
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/* DIT=1, BGR=1, HWM=0, I/D1-0=11, AM=1, LG2-0=000 */
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lcd_write_reg(R_ENTRY_MODE, 0x9038);
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/* CP15-0=0000000000000000 */
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lcd_write_reg(R_COMPARE_REG, 0x0000);
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/* NO1-0=01, SDT1-0=00, EQ1-0=00, DIV1-0=00, RTN3-00000 */
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lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x4000);
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/* SCN4-0=00010 (G160) */
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lcd_write_reg(R_GATE_SCAN_START_POS, 0x0002);
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/* VL7-0=0x00 */
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lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000);
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/* SE17-10(End)=0x9f (159), SS17-10(Start)=0x00 */
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lcd_write_reg(R_1ST_SCR_DRV_POS, 0x9f00);
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/* SE27-20(End)=0x5c (92), SS27-20(Start)=0x00 */
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lcd_write_reg(R_2ND_SCR_DRV_POS, 0x5c00);
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/* HEA7-0=0x7f, HSA7-0=0x00 */
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lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0x7f00); /* Vertical stripe */
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/* PKP12-10=0x0, PKP02-00=0x0 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0003);
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/* PKP32-30=0x4, PKP22-20=0x0 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0400);
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/* PKP52-50=0x4, PKP42-40=0x7 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0407);
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/* PRP12-10=0x3, PRP02-00=0x5 */
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lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x0305);
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/* PKN12-10=0x0, PKN02-00=0x3 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0003);
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/* PKN32-30=0x7, PKN22-20=0x4 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 0x0704);
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/* PKN52-50=0x4, PRN42-40=0x7 */
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lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0407);
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/* PRN12-10=0x5, PRN02-00=0x3 */
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||||
lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0503);
|
||||
/* VRP14-10=0x14, VRP03-00=0x09 */
|
||||
lcd_write_reg(R_GAMMA_AMP_ADJ_POS, 0x1409);
|
||||
/* VRN14-00=0x06, VRN03-00=0x02 */
|
||||
lcd_write_reg(R_GAMMA_AMP_ADJ_NEG, 0x0602);
|
||||
|
||||
sleep(HZ/25);
|
||||
/* 100ms or more; time for step-up circuits to stabilize */
|
||||
sleep(HZ/10);
|
||||
|
||||
lcd_write_reg(0x0d,0x0411);
|
||||
/** Display ON Sequence **/
|
||||
/* Per datasheet Rev.1.10, Jun.21.2003, p. 97 */
|
||||
|
||||
sleep(HZ/100);
|
||||
/* PT1-0=00, VLE2-1=00, SPT=0, GON=0, DTE=0, REV=1, D1-0=01 */
|
||||
lcd_write_reg(R_DISP_CONTROL, 0x0005);
|
||||
|
||||
lcd_write_reg(0x07,0x0006);
|
||||
lcd_write_reg(0x07,0x036);
|
||||
lcd_write_reg(0x07,0x037);
|
||||
lcd_write_reg(0x07,0x0037);
|
||||
return;
|
||||
sleep(HZ/25); /* Wait 2 frames or more */
|
||||
|
||||
/* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=0, REV=1, D1-0=01 */
|
||||
lcd_write_reg(R_DISP_CONTROL, 0x0025);
|
||||
/* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=0, REV=1, D1-0=11 */
|
||||
lcd_write_reg(R_DISP_CONTROL, 0x0027);
|
||||
|
||||
sleep(HZ/25); /* Wait 2 frames or more */
|
||||
|
||||
/* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=1, REV=1, D1-0=11 */
|
||||
lcd_write_reg(R_DISP_CONTROL, 0x0037);
|
||||
|
||||
display_on = true;
|
||||
y_offset = 0;
|
||||
roll_offset = 0;
|
||||
}
|
||||
|
||||
void lcd_enable(bool on)
|
||||
|
@ -274,51 +308,167 @@ void lcd_blit(const fb_data* data, int x, int by, int width,
|
|||
|
||||
|
||||
/* Update the display.
|
||||
This must be called after all other LCD functions that change the display. */
|
||||
This must be called after all other LCD functions that change the
|
||||
lcd frame buffer. */
|
||||
void lcd_update(void) ICODE_ATTR;
|
||||
void lcd_update(void)
|
||||
{
|
||||
if(display_on){
|
||||
/* Optimized for full-screen write. */
|
||||
const unsigned long *ptr, *ptr_end;
|
||||
|
||||
if (!display_on)
|
||||
return;
|
||||
|
||||
/* Set start position and window */
|
||||
/* Just add roll offset to start address. CP will roll back around. */
|
||||
lcd_write_reg(R_RAM_ADDR_SET, y_offset + roll_offset); /* X == 0 */
|
||||
lcd_write_reg(R_VERT_RAM_ADDR_POS, (LCD_WIDTH-1) << 8);
|
||||
|
||||
/* Copy display bitmap to hardware */
|
||||
lcd_write_reg(R_RAM_ADDR_SET, 0x0000);
|
||||
lcd_begin_write_gram();
|
||||
lcd_write_data((unsigned short *)lcd_framebuffer, LCD_WIDTH*LCD_HEIGHT);
|
||||
}
|
||||
|
||||
ptr = (unsigned long *)lcd_framebuffer;
|
||||
ptr_end = ptr + (LCD_WIDTH*LCD_HEIGHT >> 1);
|
||||
|
||||
do
|
||||
{
|
||||
/* 16 words per turns out to be about optimal according to
|
||||
test_fps. */
|
||||
lcd_write_two(*ptr++);
|
||||
#ifndef BOOTLOADER
|
||||
lcd_write_two(*ptr++);
|
||||
lcd_write_two(*ptr++);
|
||||
lcd_write_two(*ptr++);
|
||||
lcd_write_two(*ptr++);
|
||||
lcd_write_two(*ptr++);
|
||||
lcd_write_two(*ptr++);
|
||||
lcd_write_two(*ptr++);
|
||||
#endif
|
||||
}
|
||||
while (ptr < ptr_end);
|
||||
} /* lcd_update */
|
||||
|
||||
/* Update a fraction of the display. */
|
||||
void lcd_update_rect(int, int, int, int) ICODE_ATTR;
|
||||
void lcd_update_rect(int x, int y, int width, int height)
|
||||
{
|
||||
if(display_on) {
|
||||
int ymax = y + height;
|
||||
int y_end;
|
||||
int odd_lead, odd_trail;
|
||||
int duff;
|
||||
const unsigned long *ptr, *duff_end;
|
||||
int stride; /* Actually end of currline -> start of next */
|
||||
|
||||
if (!display_on)
|
||||
return;
|
||||
|
||||
if (x + width > LCD_WIDTH)
|
||||
width = LCD_WIDTH - x;
|
||||
width = LCD_WIDTH - x; /* Clip right */
|
||||
if (x < 0)
|
||||
width += x, x = 0; /* Clip left */
|
||||
if (width <= 0)
|
||||
return; /* nothing left to do, 0 is harmful to lcd_write_data() */
|
||||
if(ymax >= LCD_HEIGHT)
|
||||
ymax = LCD_HEIGHT-1;
|
||||
return; /* nothing left to do */
|
||||
|
||||
/* set update window */
|
||||
y_end = y + height;
|
||||
if (y_end > LCD_HEIGHT)
|
||||
y_end = LCD_HEIGHT; /* Clip bottom */
|
||||
if (y < 0)
|
||||
y = 0; /* Clip top */
|
||||
if (y >= y_end)
|
||||
return; /* nothing left to do */
|
||||
|
||||
/* horiz ram addr */
|
||||
lcd_write_reg(R_HORIZ_RAM_ADDR_POS, (ymax<<8) | y);
|
||||
ptr = (unsigned long *)&lcd_framebuffer[y][x];
|
||||
|
||||
/* vert ram addr */
|
||||
/* Set start position and window */
|
||||
lcd_write_reg(R_RAM_ADDR_SET, (x << 8) |
|
||||
(((y + roll_offset) & 127) + y_offset));
|
||||
lcd_write_reg(R_VERT_RAM_ADDR_POS, ((x + width - 1) << 8) | x);
|
||||
lcd_write_reg(R_RAM_ADDR_SET, (x<<8) | y);
|
||||
|
||||
lcd_begin_write_gram();
|
||||
|
||||
/* Copy specified rectangle bitmap to hardware */
|
||||
for (; y <= ymax; y++)
|
||||
/* Aligning source reads to long boundaries helps 2% - 3% with IRAM
|
||||
buffer. DK with DRAM. */
|
||||
|
||||
/* special case widths 1 and 2. */
|
||||
switch (width)
|
||||
{
|
||||
lcd_write_data ((unsigned short *)&lcd_framebuffer[y][x], width);
|
||||
case 1:
|
||||
odd_lead = 1; /* odd_lead case writes pixels */
|
||||
odd_trail = 0;
|
||||
duff = 0; /* Squelch compiler warning. */
|
||||
duff_end = ptr;
|
||||
break;
|
||||
case 2: /* Just read as long */
|
||||
odd_lead = 0;
|
||||
odd_trail = 0;
|
||||
duff = 1;
|
||||
duff_end = ptr + 1;
|
||||
break;
|
||||
default:
|
||||
odd_lead = x & 1;
|
||||
|
||||
if (odd_lead)
|
||||
{
|
||||
duff = width - 1;
|
||||
odd_trail = duff & 1;
|
||||
duff >>= 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
duff = width >> 1;
|
||||
odd_trail = width & 1;
|
||||
}
|
||||
|
||||
/* reset update window */
|
||||
lcd_write_reg(R_HORIZ_RAM_ADDR_POS, 0x7f00);
|
||||
lcd_write_reg(R_VERT_RAM_ADDR_POS, 0x9f00);
|
||||
duff_end = ptr + duff;
|
||||
#ifndef BOOTLOADER
|
||||
duff &= 7;
|
||||
#endif
|
||||
} /* end switch */
|
||||
|
||||
stride = LCD_WIDTH - width + odd_trail; /* See odd_trail below */
|
||||
|
||||
do
|
||||
{
|
||||
if (odd_lead)
|
||||
{
|
||||
/* Write odd start pixel. */
|
||||
lcd_write_one(*(unsigned short *)ptr);
|
||||
ptr = (unsigned long *)((short *)ptr + 1);
|
||||
}
|
||||
|
||||
if (ptr < duff_end)
|
||||
{
|
||||
#ifdef BOOTLOADER
|
||||
do
|
||||
lcd_write_two(*ptr);
|
||||
while (++ptr < duff_end);
|
||||
#else
|
||||
switch (duff)
|
||||
{
|
||||
do
|
||||
{
|
||||
case 0: lcd_write_two(*ptr++);
|
||||
case 7: lcd_write_two(*ptr++);
|
||||
case 6: lcd_write_two(*ptr++);
|
||||
case 5: lcd_write_two(*ptr++);
|
||||
case 4: lcd_write_two(*ptr++);
|
||||
case 3: lcd_write_two(*ptr++);
|
||||
case 2: lcd_write_two(*ptr++);
|
||||
case 1: lcd_write_two(*ptr++);
|
||||
}
|
||||
while (ptr < duff_end);
|
||||
} /* end switch */
|
||||
#endif /* BOOTLOADER */
|
||||
|
||||
duff_end += LCD_WIDTH/2;
|
||||
}
|
||||
|
||||
if (odd_trail)
|
||||
{
|
||||
/* Finish remaining odd pixel. */
|
||||
lcd_write_one(*(unsigned short *)ptr);
|
||||
/* Stride increased by one pixel. */
|
||||
}
|
||||
|
||||
ptr = (unsigned long *)((short *)ptr + stride);
|
||||
}
|
||||
while (++y < y_end);
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue