forked from len0rd/rockbox
Add DM320 I²C driver, although not (yet) enabled in the sources.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17050 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Maurus Cuelenaere
parent
6848961aa5
commit
c02b183546
2 changed files with 119 additions and 45 deletions
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@ -7,7 +7,9 @@
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 by Karl Kurbjun
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* Copyright (C) 2008 by Maurus Cuelenaere
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*
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* DM320 I²C driver
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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@ -17,39 +19,133 @@
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*
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****************************************************************************/
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#include "system.h"
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#include "thread.h"
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#include "i2c-dm320.h"
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#if 0
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static int i2c_getack(void)
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#define I2C_SCS_COND_START 0x0001
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#define I2C_SCS_COND_STOP 0x0002
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#define I2C_SCS_XMIT 0x0004
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#define I2C_TX_ACK (1 << 20)
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static struct mutex i2c_mtx;
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static inline void i2c_begin(void)
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{
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return 0;
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mutex_lock(&i2c_mtx);
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}
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static int i2c_start(void)
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static inline void i2c_end(void)
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{
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return 0;
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mutex_unlock(&i2c_mtx);
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}
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static void i2c_stop(void)
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static inline bool i2c_getack(void)
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{
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return (IO_I2C_RXDATA & 0x100)>>8;
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}
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static int i2c_outb(unsigned char byte)
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{
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(void) byte;
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return 0;
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}
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#endif
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#define WAIT_FOR_I2C if(IO_I2C_SCS & 0x4){ \
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while(IO_I2C_SCS & 0x4) { \
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asm volatile("nop"); \
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} \
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} \
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void i2c_write(int addr, const unsigned char *buf, int count)
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static inline void i2c_start(void)
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{
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(void) addr;
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(void) buf;
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(void) count;
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IO_I2C_SCS |= I2C_SCS_XMIT;
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return;
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}
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int i2c_write(unsigned short address, const unsigned char *buf, int count)
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{
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int i;
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int ret=0;
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i2c_begin();
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IO_I2C_TXDATA = ( (address << 1) & 0xFF ) | (address>0x7F ? 0 : 1 ) | I2C_TX_ACK;
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IO_I2C_SCS &= ~0x3; //clear conditions
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IO_I2C_SCS |= I2C_SCS_COND_START; // write 'start condition'
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i2c_start();
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WAIT_FOR_I2C;
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/* experimental */
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if(address>0x7F){ // check if it is 10-bit instead of 7-bit
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IO_I2C_TXDATA = ( (address >> 7) & 0xFF) | I2C_TX_ACK;
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IO_I2C_SCS &= ~0x3; //normal transfer
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i2c_start();
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WAIT_FOR_I2C;
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IO_I2C_TXDATA = ( (address << 1) & 0xFF) | 1 | I2C_TX_ACK;
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IO_I2C_SCS &= ~0x3; //clear conditions
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IO_I2C_SCS |= I2C_SCS_COND_START; //write 'start condition'
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i2c_start();
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WAIT_FOR_I2C;
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}
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for(i=0; i<count; i++){
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IO_I2C_TXDATA = buf[i] | I2C_TX_ACK;
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IO_I2C_SCS &= ~0x3; //normal transfer
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i2c_start();
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WAIT_FOR_I2C;
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if(!i2c_getack())
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ret = -1;
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}
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IO_I2C_SCS &= ~0x3; //clear conditions
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IO_I2C_SCS |= I2C_SCS_COND_STOP; //write 'stop condition'
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i2c_start();
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WAIT_FOR_I2C;
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i2c_end();
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return ret;
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}
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int i2c_read(unsigned short address, unsigned char* buf, int count)
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{
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int i;
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int ack=0;
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i2c_begin();
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IO_I2C_TXDATA = ( (address << 1) & 0xFF ) | (address>0x7F ? 0 : 1 ) | I2C_TX_ACK;
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IO_I2C_SCS &= ~0x3; //clear conditions
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IO_I2C_SCS |= I2C_SCS_COND_START; // write 'start condition'
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i2c_start();
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WAIT_FOR_I2C;
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/* experimental */
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if(address>0x7F){ // check if it is 10-bit instead of 7-bit
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IO_I2C_TXDATA = ( (address >> 7) & 0xFF ) | I2C_TX_ACK;
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IO_I2C_SCS &= ~0x3; //normal transfer
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i2c_start();
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WAIT_FOR_I2C;
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IO_I2C_TXDATA = ( (address << 1) & 0xFF ) | 1 | I2C_TX_ACK;
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IO_I2C_SCS &= ~0x3; //clear conditions
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IO_I2C_SCS |= I2C_SCS_COND_START; //write 'start condition'
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i2c_start();
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WAIT_FOR_I2C;
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}
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for(i=0; i<count; i++){
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unsigned short temp;
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IO_I2C_TXDATA = 0xFF | ( (count-1)==i ? I2C_TX_ACK : 0);
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IO_I2C_SCS &= ~0x3; //normal transfer
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i2c_start();
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WAIT_FOR_I2C;
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temp = IO_I2C_RXDATA;
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buf[i] = temp & 0xFF;
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ack = (temp & 0x100) >> 8;
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}
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IO_I2C_SCS &= ~0x3; //clear conditions
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IO_I2C_SCS |= I2C_SCS_COND_STOP; //write 'stop condition'
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i2c_start();
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WAIT_FOR_I2C;
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i2c_end();
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return ack;
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}
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void i2c_init(void)
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{
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#if 0 //TODO: mimic OF I2C clock settings; currently this is done by the bootloader
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IO_CLK_MOD2 &= ~CLK_MOD2_I2C; // turn I²C clock off (just to be sure)
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IO_CLK_LPCTL1 &= ~1; // set Powerdown mode to off
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IO_CLK_SEL0 &= ~0x800; // set I²C clock to PLLA
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IO_CLK_DIV4 &= ~0x1F; // I²C clock division = 1
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IO_CLK_MOD2 |= CLK_MOD2_I2C; // enable I²C clock
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#endif
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IO_I2C_SCS &= ~0x8; //set clock to 100 kHz
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IO_INTC_EINT2 &= ~INTR_EINT2_I2C; // disable I²C interrupt
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}
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@ -5,9 +5,9 @@
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id: i2c-meg-fx.h 13720 2007-06-26 02:11:30Z jethead71 $
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* $Id$
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*
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* Copyright (C) 2007 by Michael Sevakis
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* Copyright (C) 2008 by Maurus Cuelenaere
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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@ -17,28 +17,6 @@
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*
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****************************************************************************/
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/* chip-specific i2c functions */
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/* IICCON */
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#define I2C_ACKGEN (1 << 7)
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#define I2C_TXCLK_512 (1 << 6)
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#define I2C_TXRX_INTENB (1 << 5)
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#define I2C_TXRX_INTPND (1 << 4)
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/* IICSTAT */
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#define I2C_MODE_MASTER (2 << 6)
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#define I2C_MODE_TX (1 << 6)
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#define I2C_BUSY (1 << 5)
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#define I2C_START (1 << 5)
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#define I2C_RXTX_ENB (1 << 4)
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#define I2C_BUS_ARB_FAILED (1 << 3)
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#define I2C_S_ADDR_STAT (1 << 2)
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#define I2C_S_ADDR_MATCH (1 << 1)
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#define I2C_ACK_L (1 << 0)
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/* IICLC */
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#define I2C_FLT_ENB (1 << 2)
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void i2c_init(void);
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void i2c_write(int addr, const unsigned char *data, int count);
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int i2c_write(unsigned short address, const unsigned char *data, int count);
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int i2c_read(unsigned short address, unsigned char* buf, int count);
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