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The code police strikes back

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@4024 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Linus Nielsen Feltzing 2003-11-07 12:15:24 +00:00
parent 0dd7d48c3a
commit bef7ab0c26
9 changed files with 77 additions and 193 deletions
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11
firmware/backlight.c
View file

@ -74,7 +74,7 @@ void backlight_thread(void)
/* Disable square wave */
rtc_write(0x0a, rtc_read(0x0a) & ~0x40);
#else
__set_bit_constant(14-8, &PADRH);
or_b(0x40, &PADRH);
#endif
}
/* else if(backlight_timer) */
@ -84,7 +84,7 @@ void backlight_thread(void)
/* Enable square wave */
rtc_write(0x0a, rtc_read(0x0a) | 0x40);
#else
__clear_bit_constant(14-8, &PADRH);
and_b(~0x40, &PADRH);
#endif
}
break;
@ -94,7 +94,7 @@ void backlight_thread(void)
/* Disable square wave */
rtc_write(0x0a, rtc_read(0x0a) & ~0x40);
#else
__set_bit_constant(14-8, &PADRH);
or_b(0x40, &PADRH);
#endif
break;
@ -172,7 +172,10 @@ void backlight_init(void)
create_thread(backlight_thread, backlight_stack,
sizeof(backlight_stack), backlight_thread_name);
__set_bit_constant(14-8, &PAIORH);
#ifndef HAVE_RTC
or_b(0x40, &PAIORH); /* Set data direction of PA14 */
#endif
backlight_on();
}

14
firmware/drivers/ata.c
View file

@ -607,11 +607,11 @@ int ata_hard_reset(void)
int ret;
/* state HRR0 */
__clear_bit_constant(9-8, &PADRH); /* assert _RESET */
and_b(~0x02, &PADRH); /* assert _RESET */
sleep(1); /* > 25us */
/* state HRR1 */
__set_bit_constant(9-8, &PADRH); /* negate _RESET */
or_b(0x02, &PADRH); /* negate _RESET */
sleep(1); /* > 2ms */
/* state HRR2 */
@ -718,11 +718,11 @@ static int io_address_detect(void)
void ata_enable(bool on)
{
if(on)
__clear_bit_constant(7, &PADRL); /* enable ATA */
and_b(~0x80, &PADRL); /* enable ATA */
else
__set_bit_constant(7, &PADRL); /* disable ATA */
or_b(0x80, &PADRL); /* disable ATA */
__set_bit_constant(7, &PAIORL);
or_b(0x80, &PAIORL);
}
static int identify(void)
@ -787,8 +787,8 @@ int ata_init(void)
led(false);
/* Port A setup */
__set_bit_constant(9-8, &PAIORH); /* output for ATA reset */
__set_bit_constant(9-8, &PADRH); /* release ATA reset */
or_b(0x02, &PAIORH); /* output for ATA reset */
or_b(0x02, &PADRH); /* release ATA reset */
PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */
sleeping = false;

21
firmware/drivers/fmradio.c
View file

@ -32,21 +32,16 @@
DO (Data Out) - PB4
*/
#define PB0 0x0001
#define PB1 0x0002
#define PB3 0x0008
#define PB4 0x0010
/* cute little functions */
#define CE_LO __clear_bit_constant(3, PBDRL_ADDR)
#define CE_HI __set_bit_constant(3, PBDRL_ADDR)
#define CL_LO __clear_bit_constant(1, PBDRL_ADDR)
#define CL_HI __set_bit_constant(1, PBDRL_ADDR)
#define DO (PBDR & PB4)
#define DI_LO __clear_bit_constant(0, PBDRL_ADDR)
#define DI_HI __set_bit_constant(0, PBDRL_ADDR)
#define CE_LO and_b(~0x08, PBDRL_ADDR)
#define CE_HI or_b(0x08, PBDRL_ADDR)
#define CL_LO and_b(~0x02, PBDRL_ADDR)
#define CL_HI or_b(0x02, PBDRL_ADDR)
#define DO (PBDR & 0x10)
#define DI_LO and_b(~0x01, PBDRL_ADDR)
#define DI_HI or_b(0x01, PBDRL_ADDR)
#define START __set_mask_constant((PB3 | PB1), PBDRL_ADDR)
#define START or_b((0x08 | 0x02), PBDRL_ADDR)
/* delay loop */
#define DELAY do { int _x; for(_x=0;_x<10;_x++);} while (0)

33
firmware/drivers/i2c.c
View file

@ -23,22 +23,23 @@
#include "debug.h"
#include "system.h"
#define PB13 0x2000
#define PB7 0x0080
#define PB5 0x0020
/*
** SDA is PB7
** SCL is PB13
*/
/* cute little functions, atomic read-modify-write */
#define SDA_LO __clear_bit_constant(7, &PBDRL)
#define SDA_HI __set_bit_constant(7, &PBDRL)
#define SDA_INPUT __clear_bit_constant(7, &PBIORL)
#define SDA_OUTPUT __set_bit_constant(7, &PBIORL)
#define SDA (PBDR & PB7)
#define SDA_LO and_b(~0x80, &PBDRL)
#define SDA_HI or_b(0x80, &PBDRL)
#define SDA_INPUT and_b(~0x80, &PBIORL)
#define SDA_OUTPUT or_b(0x80, &PBIORL)
#define SDA (PBDR & 0x80)
#define SCL_INPUT __clear_bit_constant(13-8, &PBIORH)
#define SCL_OUTPUT __set_bit_constant(13-8, &PBIORH)
#define SCL_LO __clear_bit_constant(13-8, &PBDRH)
#define SCL_HI __set_bit_constant(13-8, &PBDRH)
#define SCL (PBDR & PB13)
#define SCL_INPUT and_b(~0x20, &PBIORH)
#define SCL_OUTPUT or_b(0x20, &PBIORH)
#define SCL_LO and_b(~0x20, &PBDRH)
#define SCL_HI or_b(0x20, &PBDRH)
#define SCL (PBDR & 0x2000)
/* arbitrary delay loop */
#define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0)
@ -82,11 +83,11 @@ void i2c_init(void)
PBCR2 &= ~0xcc00; /* PB5 abd PB7 */
/* PB5 is "MAS enable". make it output and high */
__set_bit_constant(5, &PBIORL);
__set_bit_constant(5, &PBDRL);
or_b(0x20, &PBIORL);
or_b(0x20, &PBDRL);
/* Set the clock line PB13 to an output */
__set_bit_constant(13-8, &PBIORH);
or_b(0x20, &PBIORH);
SDA_OUTPUT;
SDA_HI;

11
firmware/drivers/led.c
View file

@ -24,19 +24,12 @@
void led(bool on)
{
#ifdef ASM_IMPLEMENTATION
if ( on )
asm("or.b" "\t" "%0,@(r0,gbr)" : : "I"(0x40), "z"(PBDR_ADDR+1));
else
asm("and.b" "\t" "%0,@(r0,gbr)" : : "I"(~0x40), "z"(PBDR_ADDR+1));
#else
if ( on )
{
__set_bit_constant(6, &PBDRL);
or_b(0x40, &PBDRL);
}
else
{
__clear_bit_constant(6, &PBDRL);
and_b(~0x40, &PBDRL);
}
#endif
}

10
firmware/drivers/mas.c
View file

@ -269,21 +269,21 @@ static int mas_devread(unsigned long *dest, int len)
#ifdef HAVE_MAS3587F
void mas_reset(void)
{
__set_bit_constant(8-8, &PAIORH);
or_b(0x01, &PAIORH);
if(old_recorder)
{
/* Older recorder models don't invert the POR signal */
__set_bit_constant(8-8, &PADRH);
or_b(0x01, &PADRH);
sleep(HZ/100);
__clear_bit_constant(8-8, &PADRH);
and_b(~0x01, &PADRH);
sleep(HZ/5);
}
else
{
__clear_bit_constant(8-8, &PADRH);
and_b(~0x01, &PADRH);
sleep(HZ/100);
__set_bit_constant(8-8, &PADRH);
or_b(0x01, &PADRH);
sleep(HZ/5);
}
}

24
firmware/drivers/power.c
View file

@ -33,11 +33,11 @@ bool charger_enabled;
void power_init(void)
{
#ifdef HAVE_CHARGE_CTRL
__set_bit_constant(5, &PBIORL); /* Set charging control bit to output */
or_b(0x20, &PBIORL); /* Set charging control bit to output */
charger_enable(false); /* Default to charger OFF */
#endif
#ifdef HAVE_ATA_POWER_OFF
__set_bit_constant(5, &PAIORL);
or_b(0x20, &PAIORL);
PACR2 &= 0xFBFF;
#endif
}
@ -63,12 +63,12 @@ void charger_enable(bool on)
#ifdef HAVE_CHARGE_CTRL
if(on)
{
__clear_bit_constant(5, &PBDRL);
and_b(~0x20, &PBDRL);
charger_enabled = 1;
}
else
{
__set_bit_constant(5, &PBDRL);
or_b(0x20, &PBDRL);
charger_enabled = 0;
}
#else
@ -80,9 +80,9 @@ void ide_power_enable(bool on)
{
#ifdef HAVE_ATA_POWER_OFF
if(on)
__set_bit_constant(5, &PADRL);
or_b(0x20, &PADRL);
else
__clear_bit_constant(5, &PADRL);
and_b(~0x20, &PADRL);
#else
on = on;
#endif
@ -92,14 +92,14 @@ void power_off(void)
{
set_irq_level(15);
#ifdef HAVE_POWEROFF_ON_PBDR
__clear_mask_constant(PBDR_BTN_OFF, &PBDRL);
__set_mask_constant(PBDR_BTN_OFF, &PBIORL);
and_b(~0x10, &PBDRL);
or_b(0x10, &PBIORL);
#elif defined(HAVE_POWEROFF_ON_PB5)
__clear_bit_constant(5, &PBDRL);
__set_bit_constant(5, &PBIORL);
and_b(~0x20, &PBDRL);
or_b(0x20, &PBIORL);
#else
__clear_bit_constant(11-8, &PADRH);
__set_bit_constant(11-8, &PAIORH);
and_b(~0x08, &PADRH);
or_b(0x08, &PAIORH);
#endif
while(1);
}

116
firmware/export/system.h
View file

@ -46,135 +46,27 @@
#define nop \
asm volatile ("nop")
#define __set_mask_constant(mask,address) \
#define or_b(mask, address) \
asm \
("or.b\t%0,@(r0,gbr)" \
: \
: /* %0 */ "I"((char)(mask)), \
/* %1 */ "z"(address-GBR))
#define __clear_mask_constant(mask,address) \
#define and_b(mask, address) \
asm \
("and.b\t%0,@(r0,gbr)" \
: \
: /* %0 */ "I"((char)~(mask)), \
: /* %0 */ "I"((char)(mask)), \
/* %1 */ "z"(address-GBR))
#define __toggle_mask_constant(mask,address) \
#define xor_b(mask, address) \
asm \
("xor.b\t%0,@(r0,gbr)" \
: \
: /* %0 */ "I"((char)(mask)), \
/* %1 */ "z"(address-GBR))
#define __test_mask_constant(mask,address) \
({ \
int result; \
asm \
("tst.b\t%1,@(r0,gbr)\n\tmovt\t%0" \
: "=r"(result) \
: "I"((char)(mask)),"z"(address-GBR)); \
result; \
})
#define __set_bit_constant(bit,address) \
asm \
("or.b\t%0,@(r0,gbr)" \
: \
: /* %0 */ "I"((char)(1<<(bit))), \
/* %1 */ "z"(address-GBR))
#define __clear_bit_constant(bit,address) \
asm \
("and.b\t%0,@(r0,gbr)" \
: \
: /* %0 */ "I"((char)~(1<<(bit))), \
/* %1 */ "z"(address-GBR))
#define __toggle_bit_constant(bit,address) \
asm \
("xor.b\t%0,@(r0,gbr)" \
: \
: /* %0 */ "I"((char)(1<<(bit))), \
/* %1 */ "z"(address-GBR))
#define __test_bit_constant(bit,address) \
({ \
int result; \
asm \
("tst.b\t%1,@(r0,gbr)\n\tmovt\t%0" \
: "=r"(result) \
: "I"((char)(1<<(bit))),"z"(address-GBR)); \
result; \
})
#define __set_mask(mask,address) /* FIXME */
#define __test_mask(mask,address) 0 /* FIXME */
#define __clear_mask(mask,address) /* FIXME */
#define __toggle_mask(mask,address) /* FIXME */
#define __set_bit(bit,address) /* FIXME */
#define __test_bit(bit,address) 0 /* FIXME */
#define __clear_bit(bit,address) /* FIXME */
#define __toggle_bit(bit,address) /* FIXME */
#define set_mask(mask,address) \
if (__builtin_constant_p (mask)) \
__set_mask_constant (mask,address); \
else \
__set_mask (mask,address)
#define clear_mask(mask,address) \
if (__builtin_constant_p (mask)) \
__clear_mask_constant (mask,address); \
else \
__clear_mask (mask,address)
#define toggle_mask(mask,address) \
if (__builtin_constant_p (mask)) \
__toggle_mask_constant (mask,address); \
else \
__toggle_mask (mask,address)
#define test_mask(mask,address) \
( \
(__builtin_constant_p (mask)) \
? (int)__test_mask_constant (mask,address) \
: (int)__test_mask (mask,address) \
)
#define set_bit(bit,address) \
if (__builtin_constant_p (bit)) \
__set_bit_constant (bit,address); \
else \
__set_bit (bit,address)
#define clear_bit(bit,address) \
if (__builtin_constant_p (bit)) \
__clear_bit_constant (bit,address); \
else \
__clear_bit (bit,address)
#define toggle_bit(bit,address) \
if (__builtin_constant_p (bit)) \
__toggle_bit_constant (bit,address); \
else \
__toggle_bit (bit,address)
#define test_bit(bit,address) \
( \
(__builtin_constant_p (bit)) \
? (int)__test_bit_constant (bit,address) \
: (int)__test_bit (bit,address) \
)
extern char __swap_bit[256];
#define swap_bit(byte) \
__swap_bit[byte]
#ifndef SIMULATOR
static inline short SWAB16(short value)

28
firmware/mpeg.c
View file

@ -740,7 +740,7 @@ void drain_dma_buffer(void)
{
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40))
{
__set_bit_constant(11-8, &PADRH);
or_b(0x08, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@ -748,7 +748,7 @@ void drain_dma_buffer(void)
the data is read */
asm(" nop\n nop\n nop\n");
asm(" nop\n nop\n nop\n");
__clear_bit_constant(11-8, &PADRH);
and_b(~0x08, &PADRH);
while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80));
}
@ -757,7 +757,7 @@ void drain_dma_buffer(void)
{
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40))
{
__clear_bit_constant(11-8, &PADRH);
and_b(~0x08, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@ -766,7 +766,7 @@ void drain_dma_buffer(void)
asm(" nop\n nop\n nop\n");
asm(" nop\n nop\n nop\n");
__set_bit_constant(11-8, &PADRH);
or_b(0x08, &PADRH);
while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80));
}
@ -814,7 +814,7 @@ static void dma_tick(void)
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)
&& i < 30)
{
__set_bit_constant(11-8, &PADRH);
or_b(0x08, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@ -828,7 +828,7 @@ static void dma_tick(void)
i++;
__clear_bit_constant(11-8, &PADRH);
and_b(~0x08, &PADRH);
/* No wait for /RTW, cause it's not necessary */
}
@ -839,7 +839,7 @@ static void dma_tick(void)
while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)
&& i < 30)
{
__clear_bit_constant(11-8, &PADRH);
and_b(~0x08, &PADRH);
while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
@ -853,7 +853,7 @@ static void dma_tick(void)
i++;
__set_bit_constant(11-8, &PADRH);
or_b(0x08, &PADRH);
/* No wait for /RTW, cause it's not necessary */
}
@ -2169,7 +2169,7 @@ static void setup_sci0(void)
PBCR1 = (PBCR1 & 0x0cff) | 0x1208;
/* Set PB12 to output */
__set_bit_constant(12-8, &PBIORH);
or_b(0x10, &PBIORH);
/* Disable serial port */
SCR0 = 0x00;
@ -2190,8 +2190,8 @@ static void setup_sci0(void)
IPRD &= 0x0ff0;
/* set PB15 and PB14 to inputs */
__clear_bit_constant(15-8, &PBIORH);
__clear_bit_constant(14-8, &PBIORH);
and_b(~0x80, &PBIORH);
and_b(~0x40, &PBIORH);
/* Enable End of DMA interrupt at prio 8 */
IPRC = (IPRC & 0xf0ff) | 0x0800;
@ -3144,7 +3144,7 @@ void mpeg_init(int volume, int bass, int treble, int balance, int loudness,
setup_sci0();
#ifdef HAVE_MAS3587F
__set_bit_constant(11-8, &PAIORH); /* output for /PR */
or_b(0x08, &PAIORH); /* output for /PR */
init_playback();
mas_version_code = mas_readver();
@ -3157,9 +3157,9 @@ void mpeg_init(int volume, int bass, int treble, int balance, int loudness,
#endif
#ifdef HAVE_MAS3507D
__clear_bit_constant(5, &PBDRL);
and_b(~0x20, &PBDRL);
sleep(HZ/5);
__set_bit_constant(5, &PBDRL);
or_b(0x20, &PBDRL);
sleep(HZ/5);
/* set IRQ6 to edge detect */