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mips: Update the MIPS threading code

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Taken from Amaury Pouly's Fiio X1 patches in gerrit.

   Xduoo X3 no longer panics on startup

Change-Id: I4c2dee832306755b9e496084cb47fb61f804af20
This commit is contained in:
Solomon Peachy 2018-08-20 11:12:58 -04:00 • committed by Marcin Bukat
parent 734be0d6aa
commit be801c61bb
2 changed files with 47 additions and 53 deletions
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17
firmware/asm/mips/thread.h
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@ -19,24 +19,9 @@
*
****************************************************************************/
/* index offset register
* 0 0 $16 s0
* 1 4 $17 s1
* 2 8 $18 s2
* 3 12 $19 s3
* 4 16 $20 s4
* 5 20 $21 s5
* 6 24 $22 s6
* 7 28 $23 s7
* 8 32 $28 gp
* 9 36 $30 s8 (s8)
* 10 40 $29 sp
* 11 44 $31 ra
* 12 48 start
*/
struct regs
{
uint32_t r[10]; /* 0-32 - Registers s0-s7, gp, fp */
uint32_t r[9]; /* 0-32 - Registers s0-s7, fp */
uint32_t sp; /* 36 - Stack pointer */
uint32_t ra; /* 40 - Return address */
uint32_t start; /* 44 - Thread start address, or NULL when started */