forked from len0rd/rockbox
ADC driver for Gigabeat S - a bit on the general side for now. Needs to have scales set properly (what physical value a reading represents isn't clear from the docs or I'm just lazy atm). Throw-in a _bunch_ more reg defines for the PMIC. Show all 16 raw channels values in debug menu.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17100 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis
parent
73d1eb4ac0
commit
b12c69bac7
5 changed files with 316 additions and 60 deletions
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@ -89,19 +89,183 @@ enum mc13783_regs_enum
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};
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/* INTERRUPT_STATUS0, INTERRUPT_MASK0, INTERRUPT_SENSE0 */
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#define MC13783_ADCDONE (1 << 0) /* x */
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#define MC13783_ADCBISDONE (1 << 1) /* x */
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#define MC13783_TS (1 << 2) /* x */
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#define MC13783_WHIGH (1 << 3) /* x */
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#define MC13783_WLOW (1 << 4) /* x */
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#define MC13783_CHGDET (1 << 6)
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#define MC13783_CHGOV (1 << 7)
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#define MC13783_CHGREV (1 << 8)
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#define MC13783_CHGSHORT (1 << 9)
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#define MC13783_CCCV (1 << 10)
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#define MC13783_CHGCURR (1 << 11)
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#define MC13783_BPONI (1 << 12)
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#define MC13783_LOBATL (1 << 13)
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#define MC13783_LOBATH (1 << 14)
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#define MC13783_UDP (1 << 15)
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#define MC13783_USB (1 << 16)
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#define MC13783_ID (1 << 19)
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#define MC13783_SE1 (1 << 21)
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#define MC13783_CKDET (1 << 22)
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#define MC13783_UDM (1 << 23)
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/* x = no sense bit */
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/* INTERRUPT_STATUS1, INTERRUPT_MASK1, INTERRUPT_SENSE1 */
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#define MC13783_HSL (1 << 0)
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#define MC13783_ON1B (1 << 3)
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#define MC13783_ON2B (1 << 4)
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#define MC13783_1HZ (1 << 0) /* x */
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#define MC13783_TODA (1 << 1) /* x */
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#define MC13783_ONOFD1 (1 << 3) /* ON1B */
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#define MC13783_ONOFD2 (1 << 4) /* ON2B */
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#define MC13783_ONOFD3 (1 << 5) /* ON3B */
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#define MC13783_SYSRST (1 << 6) /* x */
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#define MC13783_RTCRST (1 << 7) /* x */
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#define MC13783_PCI (1 << 8) /* x */
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#define MC13783_WARM (1 << 9) /* x */
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#define MC13783_MEMHLD (1 << 10) /* x */
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#define MC13783_PWRRDY (1 << 11)
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#define MC13783_THWARNL (1 << 12)
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#define MC13783_THWARNH (1 << 13)
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#define MC13783_CLK (1 << 14)
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#define MC13783_SEMAF (1 << 15) /* x */
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#define MC13783_MC2B (1 << 17)
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#define MC13783_HSDET (1 << 18)
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#define MC13783_HSL (1 << 19)
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#define MC13783_ALSPTH (1 << 20)
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#define MC13783_AHSSHORT (1 << 21)
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/* x = no sense bit */
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/* POWER_UP_MODE_SENSE */
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#define MC13783_ICTESTS (1 << 0)
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#define MC13783_CLKSELS (1 << 1)
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#define MC13783_PUMS1Sr(r) (((r) >> 2) & 0x3)
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#define MC13783_PUMS2S (((r) >> 4) & 0x3)
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#define MC13783_PUMS3S (((r) >> 6) & 0x3)
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#define PUMS_LOW 0x0
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#define PUMS_OPEN 0x1
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#define PUMS_HIGH 0x2
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#define MC13783_CHRGMOD0Sr(r) (((r) >> 8) & 0x3)
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#define MC13783_CHRGMOD1Sr(r) (((r) >> 10) & 0x3)
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#define CHRGMOD_LOW 0x0
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#define CHRGMOD_OPEN 0x1
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#define CHRGMOD_HIGH 0x3
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#define MC13783_UMODSr(r) (((r) >> 12) & 0x3)
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#define UMODS0_LOW_UMODS1_LOW 0x0
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#define UMODS0_OPEN_UMODS1_LOW 0x1
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#define UMODS0_DONTCARE_UMODS1_HIGH 0x2
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#define UMODS0_HIGH_UMODS1_LOW 0x3
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#define MC13783_USBEN (1 << 14)
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#define MC13783_SW1ABS (1 << 15)
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#define MC13783_SW2ABS (1 << 16)
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/* IDENTIFICATION */
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/* SEMAPHORE */
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/* ARBITRATION_PERIPHERAL_AUDIO */
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/* ARBITRATION_SWITCHERS */
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/* ARBITRATION_REGULATORS0 */
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/* ARBITRATION_REGULATORS1 */
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/* POWER_CONTROL0 */
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#define MC13783_USEROFFSPI (1 << 3)
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/* POWER_CONTROL1 */
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/* POWER_CONTROL2 */
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/* REGEN_ASSIGNMENT */
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/* MEMORYA */
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/* MEMORYB */
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/* RTC_TIME */
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/* RTC_ALARM */
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/* RTC_DAY */
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/* RTC_DAY_ALARM */
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/* SWITCHERS0 */
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/* SWITCHERS1 */
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/* SWITCHERS2 */
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/* SWITCHERS3 */
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/* SWITCHERS4 */
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/* SWITCHERS5 */
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/* REGULATOR_SETTING0 */
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/* REGULATOR_SETTING1 */
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/* REGULATOR_MODE0 */
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/* REGULATOR_MODE1 */
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/* POWER_MISCELLANEOUS */
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/* AUDIO_RX0 */
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/* AUDIO_RX1 */
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/* AUDIO_TX */
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/* SSI_NETWORK */
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/* AUDIO_CODEC */
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/* AUDIO_STEREO_CODEC */
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/* ADC0 */
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#define MC13783_LICELLCON (1 << 0)
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#define MC13783_CHRGICON (1 << 1)
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#define MC13783_BATICON (1 << 2)
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#define MC13783_RTHEN (1 << 3)
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#define MC13783_DTHEN (1 << 4)
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#define MC13783_UIDEN (1 << 5)
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#define MC13783_ADOUTEN (1 << 6)
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#define MC13783_ADOUTPER (1 << 7)
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#define MC13783_ADREFEN (1 << 10)
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#define MC13783_ADREFMODE (1 << 11)
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#define MC13783_TSMODw(w) ((w) << 12)
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#define MC13783_TSMODr(r) (((r) >> 12) & 0x3)
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#define MC13783_CHRGRAWDIV (1 << 15)
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#define MC13783_ADINC1 (1 << 16)
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#define MC13783_ADINC2 (1 << 17)
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#define MC13783_WCOMP (1 << 18)
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#define MC13783_ADCBIS0 (1 << 23)
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/* ADC1 */
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#define MC13783_ADEN (1 << 0)
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#define MC13783_RAND (1 << 1)
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#define MC13783_ADSEL (1 << 3)
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#define MC13783_TRIGMASK (1 << 4)
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#define MC13783_ADA1w(w) ((w) << 5)
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#define MC13783_ADA1r(r) (((r) >> 5) & 0x3)
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#define MC13783_ADA2w(w) ((w) << 8)
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#define MC13783_ADA2r(r) (((r) >> 8) & 0x3)
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#define MC13783_ATOw(w) ((w) << 11)
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#define MC13783_ATOr(r) (((r) >> 11) & 0xff)
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#define MC13783_ATOX (1 << 19)
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#define MC13783_ASC (1 << 20)
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#define MC13783_ADTRIGIGN (1 << 21)
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#define MC13783_ADONESHOT (1 << 22)
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#define MC13783_ADCBIS1 (1 << 23)
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/* ADC2 */
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#define MC13783_ADD1r(r) (((r) >> 2) & 0x3ff)
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#define MC13783_ADD2r(r) (((r) >> 14) & 0x3ff)
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/* ADC3 */
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#define MC13783_WHIGHw(w) ((w) << 0)
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#define MC13783_WHIGHr(r) ((r) & 0x3f)
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#define MC13783_ICIDr(r) (((r) >> 6) & 0x3)
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#define MC13783_WLOWw(w) ((w) << 9)
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#define MC13783_WLOWr(r) (((r) >> 9) & 0x3f)
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#define MC13783_ADCBIS2 (1 << 23)
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/* ADC4 */
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#define MC13783_ADCBIS1r(r) (((r) >> 2) & 0x3ff)
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#define MC13783_ADCBIS2r(r) (((r) >> 14) & 0x3ff)
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/* CHARGER */
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/* USB0 */
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/* CHARGER_USB1 */
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/* LED_CONTROL0 */
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#define MC13783_LEDEN (1 << 0)
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/* LED_CONTROL1 */
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/* LED_CONTROL2 */
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/* LED_CONTROL3 */
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/* LED_CONTROL4 */
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/* LED_CONTROL5 */
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/* TRIM0 */
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/* TRIM1 */
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/* TEST0 */
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/* TEST1 */
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/* TEST2 */
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/* TEST3 */
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void mc13783_init(void);
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uint32_t mc13783_set(unsigned address, uint32_t bits);
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uint32_t mc13783_clear(unsigned address, uint32_t bits);
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@ -25,6 +25,7 @@
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#include "font.h"
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#include "debug-target.h"
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#include "mc13783.h"
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#include "adc.h"
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bool __dbg_hw_info(void)
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{
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@ -47,11 +48,6 @@ bool __dbg_ports(void)
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MC13783_RTC_ALARM,
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MC13783_RTC_DAY,
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MC13783_RTC_DAY_ALARM,
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MC13783_ADC0,
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MC13783_ADC1,
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MC13783_ADC2,
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MC13783_ADC3,
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MC13783_ADC4,
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};
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static const char *pmic_regnames[ARRAYLEN(pmic_regset)] =
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@ -64,11 +60,6 @@ bool __dbg_ports(void)
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"RTC Alarm ",
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"RTC Day ",
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"RTC Day Al",
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"ADC0 ",
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"ADC1 ",
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"ADC2 ",
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"ADC3 ",
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"ADC4 ",
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};
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uint32_t pmic_regs[ARRAYLEN(pmic_regset)];
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@ -132,6 +123,21 @@ bool __dbg_ports(void)
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lcd_puts(0, line++, buf);
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}
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line++;
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lcd_puts(0, line++, "ADC"); line++;
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for (i = 0; i < NUM_ADC_CHANNELS; i += 4)
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{
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snprintf(buf, sizeof(buf),
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"CH%02d:%04u CH%02d:%04u CH%02d:%04u CH%02d:%04u",
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i+0, adc_read(i+0),
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i+1, adc_read(i+1),
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i+2, adc_read(i+2),
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i+3, adc_read(i+3));
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lcd_puts(0, line++, buf);
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}
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lcd_update();
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if (button_get_w_tmo(HZ/10) == (DEBUG_CANCEL|BUTTON_REL))
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return false;
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@ -7,7 +7,7 @@
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 by Wade Brown
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* Copyright (C) 2008 by Michael Sevakis
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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@ -16,37 +16,96 @@
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "cpu.h"
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#include "config.h"
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#include "system.h"
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#include "mc13783.h"
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#include "adc-target.h"
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#include "kernel.h"
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/* prototypes */
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static unsigned short __adc_read(int channel);
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static void adc_tick(void);
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/* Do this so we may read all channels in a single SPI message */
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static const unsigned char reg_array[NUM_ADC_CHANNELS/2] =
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{
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MC13783_ADC2,
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MC13783_ADC2,
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MC13783_ADC2,
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MC13783_ADC2,
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MC13783_ADC2,
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MC13783_ADC2,
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MC13783_ADC2,
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MC13783_ADC2,
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};
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static uint32_t channels[2][NUM_ADC_CHANNELS/2];
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static struct wakeup adc_wake;
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static struct mutex adc_mtx;
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static long last_adc_read[2]; /* One for each input group */
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/* Read 10-bit ADC channel */
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unsigned short adc_read(int channel)
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{
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uint32_t data;
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int input_select;
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if ((unsigned)channel >= NUM_ADC_CHANNELS)
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return ADC_READ_ERROR;
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mutex_lock(&adc_mtx);
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input_select = channel >> 3;
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/* Limit the traffic through here */
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if (TIME_AFTER(current_tick, last_adc_read[input_select]))
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{
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/* Keep enable, start conversion, increment from channel 0,
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* increment from channel 4 */
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uint32_t adc1 = MC13783_ADEN | MC13783_ASC | MC13783_ADA1w(0) |
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MC13783_ADA2w(4);
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if (input_select == 1)
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adc1 |= MC13783_ADSEL; /* 2nd set of inputs */
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/* Start conversion */
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mc13783_write(MC13783_ADC1, adc1);
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/* Wait for done signal */
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wakeup_wait(&adc_wake, TIMEOUT_BLOCK);
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/* Read all 8 channels that are converted - two channels in each
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* word. */
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mc13783_read_regset(reg_array, channels[input_select],
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NUM_ADC_CHANNELS/2);
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last_adc_read[input_select] = current_tick;
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}
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data = channels[input_select][channel & 7];
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mutex_unlock(&adc_mtx);
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/* Extract the bitfield depending on even or odd channel number */
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return (channel & 1) ? MC13783_ADD2r(data) : MC13783_ADD1r(data);
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}
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/* Called when conversion is complete */
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void adc_done(void)
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{
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wakeup_signal(&adc_wake);
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}
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void adc_init(void)
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{
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}
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wakeup_init(&adc_wake);
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mutex_init(&adc_mtx);
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/* Called to get the recent ADC reading */
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inline unsigned short adc_read(int channel)
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{
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(void)channel;
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return 0;
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}
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/* Init so first reads get data */
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last_adc_read[0] = last_adc_read[1] = current_tick-1;
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/**
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* Read the ADC by polling
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* @param channel The ADC channel to read
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* @return 10bit reading from ADC channel or ADC_READ_ERROR if timeout
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*/
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static unsigned short __adc_read(int channel)
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{
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(void)channel;
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return 0;
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}
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/* add this to the tick so that the ADC converts are done in the background */
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static void adc_tick(void)
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{
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/* Enable increment-by-read, thermistor */
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mc13783_write(MC13783_ADC0, MC13783_ADINC2 | MC13783_ADINC1 |
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MC13783_RTHEN);
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/* Enable ADC, set multi-channel mode */
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mc13783_write(MC13783_ADC1, MC13783_ADEN);
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/* Enable the ADCDONE interrupt - notifications are dispatched by
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* event handler. */
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mc13783_clear(MC13783_INTERRUPT_MASK0, MC13783_ADCDONE);
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}
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@ -20,18 +20,29 @@
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#define _ADC_TARGET_H_
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/* only two channels used by the Gigabeat */
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#define NUM_ADC_CHANNELS 2
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#define NUM_ADC_CHANNELS 16
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#define ADC_BATTERY 0
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#define ADC_UNKNOWN_1 1
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#define ADC_UNKNOWN_2 2
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#define ADC_UNKNOWN_3 3
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#define ADC_UNKNOWN_4 4
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#define ADC_UNKNOWN_5 5
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#define ADC_UNKNOWN_6 6
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#define ADC_UNKNOWN_7 7
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#define ADC_HPREMOTE 8
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#define ADC_UNKNOWN_9 9
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#define ADC_UNKNOWN_10 10
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#define ADC_UNKNOWN_11 11
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#define ADC_UNKNOWN_12 12
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#define ADC_UNKNOWN_13 13
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#define ADC_UNKNOWN_14 14
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#define ADC_UNKNOWN_15 15
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#define ADC_BATTERY 0
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#define ADC_HPREMOTE 1
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#define ADC_UNKNOWN_3 2
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#define ADC_UNKNOWN_4 3
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#define ADC_UNKNOWN_5 4
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#define ADC_UNKNOWN_6 5
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#define ADC_UNKNOWN_7 6
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#define ADC_UNKNOWN_8 7
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#define ADC_UNREG_POWER ADC_BATTERY /* For compatibility */
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#define ADC_READ_ERROR 0xFFFF
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void adc_done(void);
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#endif
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@ -26,6 +26,7 @@
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#include "power-imx31.h"
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#include "button-target.h"
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#include "adc-target.h"
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/* This is all based on communicating with the MC13783 PMU which is on
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* CSPI2 with the chip select at 0. The LCD controller resides on
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@ -64,17 +65,21 @@ static __attribute__((noreturn)) void mc13783_interrupt_thread(void)
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gpio_enable_event(MC13783_GPIO_NUM, MC13783_EVENT_ID);
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/* Check initial states */
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/* Check initial states for events with a sense bit */
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value = mc13783_read(MC13783_INTERRUPT_SENSE0);
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set_charger_inserted(value & MC13783_CHGDET);
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value = mc13783_read(MC13783_INTERRUPT_SENSE1);
|
||||
button_power_set_state((value & MC13783_ON1B) == 0);
|
||||
set_headphones_inserted((value & MC13783_ON2B) == 0);
|
||||
button_power_set_state((value & MC13783_ONOFD1) == 0);
|
||||
set_headphones_inserted((value & MC13783_ONOFD2) == 0);
|
||||
|
||||
/* Enable desired PMIC interrupts */
|
||||
pending[0] = pending[1] = 0xffffff;
|
||||
mc13783_write_regset(status_regs, pending, 2);
|
||||
|
||||
/* Enable desired PMIC interrupts - some are unmasked in the drivers that
|
||||
* handle a specific task */
|
||||
mc13783_clear(MC13783_INTERRUPT_MASK0, MC13783_CHGDET);
|
||||
mc13783_clear(MC13783_INTERRUPT_MASK1, MC13783_ON1B | MC13783_ON2B);
|
||||
mc13783_clear(MC13783_INTERRUPT_MASK1, MC13783_ONOFD1 | MC13783_ONOFD2);
|
||||
|
||||
while (1)
|
||||
{
|
||||
|
|
@ -83,10 +88,16 @@ static __attribute__((noreturn)) void mc13783_interrupt_thread(void)
|
|||
mc13783_read_regset(status_regs, pending, 2);
|
||||
mc13783_write_regset(status_regs, pending, 2);
|
||||
|
||||
|
||||
if (pending[0])
|
||||
{
|
||||
/* Handle ...PENDING0 */
|
||||
|
||||
/* Handle interrupts without a sense bit */
|
||||
if (pending[0] & MC13783_ADCDONE)
|
||||
adc_done();
|
||||
|
||||
/* Handle interrupts that have a sense bit that needs to
|
||||
* be checked */
|
||||
if (pending[0] & MC13783_CHGDET)
|
||||
{
|
||||
value = mc13783_read(MC13783_INTERRUPT_SENSE0);
|
||||
|
|
@ -96,19 +107,24 @@ static __attribute__((noreturn)) void mc13783_interrupt_thread(void)
|
|||
}
|
||||
}
|
||||
|
||||
|
||||
if (pending[1])
|
||||
{
|
||||
/* Handle ...PENDING1 */
|
||||
if (pending[1] & (MC13783_ON1B | MC13783_ON2B))
|
||||
|
||||
/* Handle interrupts without a sense bit */
|
||||
/* ... */
|
||||
|
||||
/* Handle interrupts that have a sense bit that needs to
|
||||
* be checked */
|
||||
if (pending[1] & (MC13783_ONOFD1 | MC13783_ONOFD2))
|
||||
{
|
||||
value = mc13783_read(MC13783_INTERRUPT_SENSE1);
|
||||
|
||||
if (pending[1] & MC13783_ON1B)
|
||||
button_power_set_state((value & MC13783_ON1B) == 0);
|
||||
if (pending[1] & MC13783_ONOFD1)
|
||||
button_power_set_state((value & MC13783_ONOFD1) == 0);
|
||||
|
||||
if (pending[1] & MC13783_ON2B)
|
||||
set_headphones_inserted((value & MC13783_ON2B) == 0);
|
||||
if (pending[1] & MC13783_ONOFD2)
|
||||
set_headphones_inserted((value & MC13783_ONOFD2) == 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue