forked from len0rd/rockbox
sd-as3525v2: command register bits
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24829 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré
parent
d19705f7fc
commit
ad7d84d315
1 changed files with 47 additions and 92 deletions
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@ -43,6 +43,7 @@
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#include <stdarg.h>
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#include "sysfont.h"
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/* debug helper */
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static int line = 0;
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static void printf(const char *format, ...)
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{
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@ -61,85 +62,18 @@ static void printf(const char *format, ...)
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}
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/* command flags */
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#define MCI_NO_RESP (0<<0)
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#define MCI_NO_RESP (0<<0)
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#define MCI_RESP (1<<0)
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#define MCI_LONG_RESP (1<<1)
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/* controller registers */
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#define SD_BASE 0xC6070000
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/*
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* STATUS register
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* & 0xBA80 = MCI_INT_DCRC | MCI_INT_DRTO | MCI_INT_FRUN | \
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* MCI_INT_HLE | MCI_INT_SBE | MCI_INT_EBE
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* & 8 = MCI_INT_DTO
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* & 0x428 = MCI_INT_DTO | MCI_INT_RXDR | MCI_INT_HTO
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* & 0x418 = MCI_INT_DTO | MCI_INT_TXDR | MCI_INT_HTO
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*/
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/*
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* INFO on CMD register
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*
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* if(cmd >= 200) cmd -= 200; (>= 200 = acmd?)
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*
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* COMMANDS (| (x<<16) BITS RESPONSE
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*
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* 1 ? reserved & ~0x80, | 0x40, | 0x8000 ?
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* 5 ? reserved for I/O cards & ~0x80, | 0x40 ?
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* 11 ? reserved & ~0x80, | 0x40, | 0x2200, | 0x800 ?
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* 14 ? reserved & ~0x80, | 0x40, | 0x2200, ~0x1000 ?
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* 19 ? reserved & ~0x80, |0x40, | 0x2700, & ~0x1000 ?
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* 20 ? reserved & ~0x80, |0x40, | 0x2700, | 0x800 ?
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* 23 ? reserved & ~0x80, | 0x40 ?
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* 39 ? reserved & ~0x80, | 0x40 ?
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* 51 ? reserved & ~0x80, | 0x40, | 0x2000, | 0x200 ?
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* 52 ? reserved for I/O & ~0x80, | 0x40 ?
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* 53 ? reserved for I/O & ~0x80, | 0x40, | 0x2200, & ~0x1000 ?
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* 253 ? & ~0x80, |0x40, | 0x2700, & ~0x1000 ?
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*
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* 0 GO IDLE STATE & ~0x4000, & ~0xC0, | 0x4000 no
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* 2 ALL SEND CID & ~0x4000, |0xC0 r2
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* 3 SEND RCA & ~0x80, | 0x40 r6
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* 6 SWITCH_FUNC & ~0x80, | 0x40 r1
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* 7 SELECT CARD & ~0x80, | 0x40 r1b
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* 8 SEND IF COND & ~0x80, | 0x40, | 0x2200, & ~0x1000 r7
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* 9 SEND CSD & ~0x4000, | 0xc0 r2
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* 12 STOP TRANSMISSION & ~0x80, | 0x40, | 0x4000 r1b
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* 13 SEND STATUS & ~0x80, | 0x40 r1
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* 15 GO INACTIVE STATE & ~0x4000, & ~0xC0 no
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* 16 SET BLOCKLEN & ~0x80, | 0x40 r1
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* 17 READ SINGLE BLOCK & ~0x80, | 0x40, | 0x2200 r1
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* 18 READ MULTIPLE BLOCK & ~0x80, | 0x40, | 0x2200 r1
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* 24 WRITE BLOCK & ~0x80, |0x40, | 0x2700 r1
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* 25 WRITE MULTIPLE BLOCK & ~0x80, |0x40, | 0x2700 r1
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* 41 SEND APP OP COND & ~0x80, | 0x40 r3
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* 42 LOCK UNLOCK & ~0x80, |0x40, | 0x2700 r1
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* 55 APP CMD & ~0x80, | 0x40 r1
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* 206 SET BUS WIDTH & ~0x80, | 0x40, | 0x2000 r1
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* 207 SELECT CARD ? & ~0x4000, & ~0xC0 r1b
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*
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*
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* bits 5:0 = cmd
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* bit 6 (0x40) = response
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* bit 7 (0x80) = long response
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* => like pl180 <=
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* BIT SET IN COMANDS:
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*
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* bit 8 (0x100) ? write block, write multi_block, lock/unlock
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* bit 9 (0x200) ? send if cond, read block, read multi_block, write block, write multi_block, lock/unlock
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* bit 10 (0x400) ? write block, write multi_block, lock/unlock
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* bit 11 (0x800) ?
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* bit 12 (0x1000) ?
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* bit 13 (0x2000) ? send if cond, read block, read multi_block, write block, write multi_block, lock/unlock, set bus width
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* bit 14 (0x4000) ? go idle state, stop transmission
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* bit 15 (0x8000) ?
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*
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*/
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#define SD_REG(x) (*(volatile unsigned long *) (SD_BASE+x))
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#define MCI_CTRL SD_REG(0x00)
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/* control bits */
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#define CTRL_RESET (1<<0)
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#define FIFO_RESET (1<<1)
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#define DMA_RESET (1<<2)
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@ -169,6 +103,23 @@ static void printf(const char *format, ...)
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#define MCI_ARGUMENT SD_REG(0x28)
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#define MCI_COMMAND SD_REG(0x2C)
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/* command bits (bits 5:0 are the command index) */
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#define CMD_RESP_EXP_BIT (1<<6)
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#define CMD_RESP_LENGTH_BIT (1<<7)
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#define CMD_CHECK_CRC_BIT (1<<8)
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#define CMD_DATA_EXP_BIT (1<<9)
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#define CMD_RW_BIT (1<<10)
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#define CMD_TRANSMODE_BIT (1<<11)
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#define CMD_SENT_AUTO_STOP_BIT (1<<12)
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#define CMD_WAIT_PRV_DAT_BIT (1<<13)
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#define CMD_ABRT_CMD_BIT (1<<14)
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#define CMD_SEND_INIT_BIT (1<<15)
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#define CMD_SEND_CLK_ONLY (1<<21)
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#define CMD_READ_CEATA (1<<22)
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#define CMD_CCS_EXPECTED (1<<23)
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#define CMD_DONE_BIT (1<<31)
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#define MCI_RESP0 SD_REG(0x30)
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#define MCI_RESP1 SD_REG(0x34)
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#define MCI_RESP2 SD_REG(0x38)
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@ -179,6 +130,15 @@ static void printf(const char *format, ...)
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* status clear */
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#define MCI_STATUS SD_REG(0x48)
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/*
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* STATUS register
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* & 0xBA80 = MCI_INT_DCRC | MCI_INT_DRTO | MCI_INT_FRUN | \
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* MCI_INT_HLE | MCI_INT_SBE | MCI_INT_EBE
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* & 8 = MCI_INT_DTO
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* & 0x428 = MCI_INT_DTO | MCI_INT_RXDR | MCI_INT_HTO
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* & 0x418 = MCI_INT_DTO | MCI_INT_TXDR | MCI_INT_HTO
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*/
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/* interrupt bits */
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#define MCI_INT_CRDDET (1<<0)
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#define MCI_INT_RE (1<<1)
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@ -222,13 +182,6 @@ static void printf(const char *format, ...)
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#define MCI_FIFO ((unsigned long *) (SD_BASE+0x100))
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#define MCI_COMMAND_ENABLE (1<<31)
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#define MCI_COMMAND_ACTIVE MCI_COMMAND_ENABLE
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#define MCI_COMMAND_RESPONSE (1<<6)
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#define MCI_COMMAND_LONG_RESPONSE (1<<7)
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static int sd_init_card(void);
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static void init_controller(void);
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@ -318,41 +271,43 @@ static bool send_cmd(const int cmd, const int arg, const int flags,
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unsigned long *response)
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{
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int val;
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val = cmd | MCI_COMMAND_ENABLE;
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val = cmd | CMD_DONE_BIT;
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if(flags & MCI_RESP)
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{
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val |= MCI_COMMAND_RESPONSE;
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val |= CMD_RESP_EXP_BIT;
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if(flags & MCI_LONG_RESP)
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val |= MCI_COMMAND_LONG_RESPONSE;
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val |= CMD_RESP_LENGTH_BIT;
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}
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if(cmd == 18) /* r */
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val |= 0x2200;
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else if(cmd == 25) /* w */
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val |= 0x2700;
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if(cmd == SD_READ_MULTIPLE_BLOCK || cmd == SD_WRITE_MULTIPLE_BLOCK)
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{
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val |= CMD_WAIT_PRV_DAT_BIT | CMD_DATA_EXP_BIT;
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if(cmd == SD_WRITE_MULTIPLE_BLOCK)
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val |= CMD_RW_BIT | CMD_CHECK_CRC_BIT;
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}
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int tmp = MCI_CLKENA;
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MCI_CLKENA = 0;
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MCI_COMMAND = 0x80202000;
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MCI_COMMAND = CMD_DONE_BIT|CMD_SEND_CLK_ONLY|CMD_WAIT_PRV_DAT_BIT;
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MCI_ARGUMENT = 0;
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int max = 10;
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while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE);
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while(max-- && MCI_COMMAND & CMD_DONE_BIT);
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MCI_CLKDIV &= ~0xff;
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MCI_CLKDIV |= 0;
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MCI_COMMAND = 0x80202000;
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MCI_COMMAND = CMD_DONE_BIT|CMD_SEND_CLK_ONLY|CMD_WAIT_PRV_DAT_BIT;
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MCI_ARGUMENT = 0;
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max = 10;
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while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE);
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while(max-- && MCI_COMMAND & CMD_DONE_BIT);
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MCI_CLKENA = tmp;
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MCI_COMMAND = 0x80202000;
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MCI_COMMAND = CMD_DONE_BIT|CMD_SEND_CLK_ONLY|CMD_WAIT_PRV_DAT_BIT;
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MCI_ARGUMENT = 0;
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max = 10;
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while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE);
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while(max-- && MCI_COMMAND & CMD_DONE_BIT);
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mci_delay();
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@ -362,7 +317,7 @@ static bool send_cmd(const int cmd, const int arg, const int flags,
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MCI_CTRL |= INT_ENABLE;
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max = 1000;
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while(max-- && MCI_COMMAND & MCI_COMMAND_ACTIVE); /* wait for cmd completion */
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while(max-- && MCI_COMMAND & CMD_DONE_BIT); /* wait for cmd completion */
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if(!max)
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return false;
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@ -538,9 +493,9 @@ static void init_controller(void)
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MCI_CLKENA = (1<<shift) - 1;
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MCI_ARGUMENT = 0;
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MCI_COMMAND = 0x80202000;
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MCI_COMMAND = CMD_DONE_BIT|CMD_SEND_CLK_ONLY|CMD_WAIT_PRV_DAT_BIT;
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int max = 10;
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while(max-- && (MCI_COMMAND & (1<<31))) ;
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while(max-- && (MCI_COMMAND & CMD_DONE_BIT)) ;
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MCI_DEBNCE = 0xfffff; /* default value */
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