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Based on Ludovic Lange excellent work, I've modified things to increase

likeliness that this works on an FM Recorder.

Reports please!


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@3143 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Daniel Stenberg 2003-01-21 19:37:29 +00:00
parent 1774d4d885
commit aaa8443af9
7 changed files with 27 additions and 11 deletions

View file

@ -24,3 +24,9 @@
/* Define this to the CPU frequency */ /* Define this to the CPU frequency */
#define CPU_FREQ 11059200 #define CPU_FREQ 11059200
/* Battery scale factor (?) */
#define BATTERY_SCALE_FACTOR 6465
/* Define this if you control power on PBDR (instead of PADR) */
#define HAVE_POWEROFF_ON_PBDR

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@ -12,3 +12,13 @@
/* Define this to the CPU frequency */ /* Define this to the CPU frequency */
#define CPU_FREQ 12000000 /* cycle time ~83.3ns */ #define CPU_FREQ 12000000 /* cycle time ~83.3ns */
/* Battery scale factor (?) */
#define BATTERY_SCALE_FACTOR 6546
/* Define this if you must discharge the data line by driving it low
and then set it to input to see if it stays low or goes high */
#define HAVE_I2C_LOW_FIRST
/* Define this if you control power on PADR (instead of PBDR) */
#define HAVE_POWEROFF_ON_PADR

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@ -21,3 +21,9 @@
/* Define this to the CPU frequency */ /* Define this to the CPU frequency */
#define CPU_FREQ 11059200 #define CPU_FREQ 11059200
/* Battery scale factor (?) */
#define BATTERY_SCALE_FACTOR 6465
/* Define this if you control power on PBDR (instead of PADR) */
#define HAVE_POWEROFF_ON_PBDR

View file

@ -38,12 +38,6 @@
#define ADC_UNREG_POWER 6 /* Battery voltage with a better scaling */ #define ADC_UNREG_POWER 6 /* Battery voltage with a better scaling */
#define ADC_EXT_POWER 7 /* The external power voltage, V=X*0.0148 */ #define ADC_EXT_POWER 7 /* The external power voltage, V=X*0.0148 */
#ifdef ARCHOS_RECORDER
#define BATTERY_SCALE_FACTOR 6465
#else
#define BATTERY_SCALE_FACTOR 6546
#endif
#define EXT_SCALE_FACTOR 14800 #define EXT_SCALE_FACTOR 14800
unsigned short adc_read(int channel); unsigned short adc_read(int channel);

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@ -124,7 +124,7 @@ int i2c_getack(void)
low until it is ready. We need to poll the clock line until it goes low until it is ready. We need to poll the clock line until it goes
high before we read the ack. */ high before we read the ack. */
#ifndef ARCHOS_RECORDER #ifdef HAVE_I2C_LOW_FIRST
SDA_LO; /* First, discharge the data line */ SDA_LO; /* First, discharge the data line */
#endif #endif
SDA_INPUT; /* And set to input */ SDA_INPUT; /* And set to input */
@ -167,7 +167,7 @@ unsigned char i2c_inb(int ack)
/* clock in each bit, MSB first */ /* clock in each bit, MSB first */
for ( i=0x80; i; i>>=1 ) { for ( i=0x80; i; i>>=1 ) {
#ifndef ARCHOS_RECORDER #ifdef HAVE_I2C_LOW_FIRST
/* Tricky business. Here we discharge the data line by driving it low /* Tricky business. Here we discharge the data line by driving it low
and then set it to input to see if it stays low or goes high */ and then set it to input to see if it stays low or goes high */
SDA_LO; /* First, discharge the data line */ SDA_LO; /* First, discharge the data line */

View file

@ -27,7 +27,7 @@
/* /*
MAS I2C defs MAS I2C defs
*/ */
#ifdef ARCHOS_RECORDER #ifdef HAVE_MAS3587F
#define MAS_ADR 0x3c #define MAS_ADR 0x3c
#define MAS_DEV_WRITE (MAS_ADR | 0x00) #define MAS_DEV_WRITE (MAS_ADR | 0x00)
#define MAS_DEV_READ (MAS_ADR | 0x01) #define MAS_DEV_READ (MAS_ADR | 0x01)

View file

@ -59,7 +59,7 @@ void charger_enable(bool on)
void ide_power_enable(bool on) void ide_power_enable(bool on)
{ {
#ifdef ARCHOS_RECORDER #ifdef HAVE_ATA_POWER_OFF
if(on) if(on)
PADR |= 0x20; PADR |= 0x20;
else else
@ -72,7 +72,7 @@ void ide_power_enable(bool on)
void power_off(void) void power_off(void)
{ {
set_irq_level(15); set_irq_level(15);
#ifdef ARCHOS_RECORDER #ifdef HAVE_POWEROFF_ON_PBDR
PBDR &= ~PBDR_BTN_OFF; PBDR &= ~PBDR_BTN_OFF;
PBIOR |= PBDR_BTN_OFF; PBIOR |= PBDR_BTN_OFF;
#else #else