devs/foxbox
1
0
Fork 0
forked from len0rd/rockbox
Code Pull requests Activity

Wrong SDRAM refresh count in the iRiver boot loader

Browse source 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6603 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Linus Nielsen Feltzing 2005-06-08 05:58:51 +00:00
parent f472410d57
commit aa9c329dbe
1 changed files with 2 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

4
firmware/crt0.S
View file

@ -190,8 +190,8 @@ irq_handler:
/* Set up the DRAM controller. The refresh is based on the 11.2896MHz
clock (5.6448MHz bus frequency). We haven't yet started the PLL */
move.l #0x80050000,%d0
move.l %d0,(0x100,%a0) /* DCR - Synchronous, 80 cycle refresh */
move.l #0x80010000,%d0
move.l %d0,(0x100,%a0) /* DCR - Synchronous, 32 cycle refresh */
/* Note: we place the SDRAM on an 0x1000000 (16M) offset because
the 5249 BGA chip has a fault which disables the use of A24. The