From a8c1fb55a4b2adf25b90521d027246f6c86bdfc4 Mon Sep 17 00:00:00 2001 From: Linus Nielsen Feltzing Date: Tue, 28 Mar 2006 12:47:10 +0000 Subject: [PATCH] Correct audio clock git-svn-id: svn://svn.rockbox.org/rockbox/trunk@9309 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/coldfire/iaudio/x5/system-x5.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/firmware/target/coldfire/iaudio/x5/system-x5.c b/firmware/target/coldfire/iaudio/x5/system-x5.c index 1d9293b5c5..dee605733f 100644 --- a/firmware/target/coldfire/iaudio/x5/system-x5.c +++ b/firmware/target/coldfire/iaudio/x5/system-x5.c @@ -37,7 +37,7 @@ void set_cpu_frequency(long frequency) /* Refresh timer for bypass frequency */ PLLCR &= ~1; /* Bypass mode */ timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false); - PLLCR = 0x13442045; + PLLCR = 0x13042045; CSCR0 = 0x00001180; /* Flash: 4 wait states */ CSCR1 = 0x00000980; /* LCD: 2 wait states */ while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked. @@ -54,7 +54,7 @@ void set_cpu_frequency(long frequency) /* Refresh timer for bypass frequency */ PLLCR &= ~1; /* Bypass mode */ timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false); - PLLCR = 0x16430045; + PLLCR = 0x16030045; CSCR0 = 0x00000580; /* Flash: 1 wait state */ CSCR1 = 0x00000180; /* LCD: 0 wait states */ while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.