forked from len0rd/rockbox
Enable IRAM on TCC7801 (Cowon D2) for a 6-12% speedup in codecs that use it, and a small increase in battery life.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26436 a1c6a512-1295-4272-9138-f99709370657
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4 changed files with 11 additions and 10 deletions
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@ -120,10 +120,13 @@ OUTPUT_FORMAT(elf32-littlemips)
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#elif defined(CPU_TCC780X) || defined(CPU_TCC77X)
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#elif defined(CPU_TCC780X) || defined(CPU_TCC77X)
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#define DRAMORIG 0x20000000
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#define DRAMORIG 0x20000000
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/*#define IRAMORIG 0x1000c000
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#if CONFIG_CPU==TCC7801
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#define IRAMSIZE 0xc000*/
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#define IRAMORIG 0x1000c000
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#define IRAMSIZE 0xc000
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#else
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#define IRAM DRAM
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#define IRAM DRAM
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#define IRAMSIZE 0
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#define IRAMSIZE 0
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#endif
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#elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
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#elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
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#if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
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#if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
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@ -727,6 +727,7 @@ Lyre prototype 1 */
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(CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC)) || /* AS3525 2MB: core only */ \
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(CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC)) || /* AS3525 2MB: core only */ \
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(CONFIG_CPU == AS3525v2 && !defined(PLUGIN) && !defined(CODEC)) || /* AS3525v2: core only */ \
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(CONFIG_CPU == AS3525v2 && !defined(PLUGIN) && !defined(CODEC)) || /* AS3525v2: core only */ \
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(CONFIG_CPU == PNX0101) || \
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(CONFIG_CPU == PNX0101) || \
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(CONFIG_CPU == TCC7801) || \
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defined(CPU_S5L870X)) || /* Samsung S5L8700: core, plugins, codecs */ \
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defined(CPU_S5L870X)) || /* Samsung S5L8700: core, plugins, codecs */ \
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(CONFIG_CPU == JZ4732 && !defined(PLUGIN) && !defined(CODEC)) /* Jz4740: core only */
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(CONFIG_CPU == JZ4732 && !defined(PLUGIN) && !defined(CODEC)) /* Jz4740: core only */
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#define ICODE_ATTR __attribute__ ((section(".icode")))
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#define ICODE_ATTR __attribute__ ((section(".icode")))
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@ -116,8 +116,7 @@ SECTIONS
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*(.icode)
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*(.icode)
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. = ALIGN(0x4);
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. = ALIGN(0x4);
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_iramend = .;
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_iramend = .;
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/* } > SRAM AT> DRAM */
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} > SRAM AT> DRAM
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} > DRAM
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_iramcopy = LOADADDR(.iram);
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_iramcopy = LOADADDR(.iram);
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@ -127,8 +126,7 @@ SECTIONS
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*(.ibss)
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*(.ibss)
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. = ALIGN(0x4);
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. = ALIGN(0x4);
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_iend = .;
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_iend = .;
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/* } > SRAM */
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} > SRAM
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} > DRAM
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.stack :
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.stack :
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{
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{
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@ -136,8 +134,7 @@ SECTIONS
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stackbegin = .;
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stackbegin = .;
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. += 0x2000;
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. += 0x2000;
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stackend = .;
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stackend = .;
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/* } > SRAM */
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} > SRAM
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} > DRAM
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.bss :
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.bss :
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{
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{
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@ -155,8 +155,8 @@ copied_start:
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ldr r0, =0x8001eec0 /* Region 6: 0x80000000-0xffffffff (2Gb) */
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ldr r0, =0x8001eec0 /* Region 6: 0x80000000-0xffffffff (2Gb) */
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str r0, [r1,#0x18] /* AP: 3 EN: 1 DO: 6 CACHE_NONE */
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str r0, [r1,#0x18] /* AP: 3 EN: 1 DO: 6 CACHE_NONE */
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ldr r0, =0x1001aee0 /* Region 7: 0x10000000-0x17ffffff (128Mb) */
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ldr r0, =0x1001aeec /* Region 7: 0x10000000-0x17ffffff (128Mb) */
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str r0, [r1,#0x1c] /* AP: 3 EN: 1 DO: 7 CACHE_NONE */
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str r0, [r1,#0x1c] /* AP: 3 EN: 1 DO: 7 CACHE_ALL */
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add r1, r1, #0x8000
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add r1, r1, #0x8000
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mcr p15, 0, r1, c2, c0, 0 /* Set TTBR = TABBASE (Virtual TLB) */
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mcr p15, 0, r1, c2, c0, 0 /* Set TTBR = TABBASE (Virtual TLB) */
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