1) add support for ata-as-arm

2) remove obsolete audio-creativezvm.c
3) fix registers in i2c-dm320.c


git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17316 a1c6a512-1295-4272-9138-f99709370657

firmware/SOURCES

@@ -101,7 +101,9 @@ drivers/lcd-remote-2bit-vi.c
 drivers/led.c
 drivers/button.c
 #ifndef SIMULATOR
+#ifdef HAVE_DAC3550A
 drivers/dac.c
+#endif
 drivers/serial.c
 #endif /* SIMULATOR */
 
@@ -715,10 +717,10 @@ target/arm/tms320dm320/mrobe-500/usb-mr500.c
 
 #ifdef CREATIVE_ZVM
 #ifndef SIMULATOR
+target/arm/ata-as-arm.S
 target/arm/lcd-as-memframe.S
 target/arm/mmu-arm.c
 target/arm/tms320dm320/creative-zvm/adc-creativezvm.c
-target/arm/tms320dm320/creative-zvm/audio-creativezvm.c
 target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c
 target/arm/tms320dm320/creative-zvm/ata-creativezvm.c
 target/arm/tms320dm320/creative-zvm/pcm-creativezvm.c

firmware/target/arm/ata-as-arm.S

@@ -33,6 +33,9 @@
     /* Untested */
     .text
     .equ    .ata_port, 0x18000000
+#elif defined(CREATIVE_ZVM)
+    .text
+    .equ    .ata_port, 0x50FEE000
 #endif
 
     .align  2

firmware/target/arm/tms320dm320/creative-zvm/ata-creativezvm.c

@@ -25,11 +25,18 @@
 #include "power.h"
 #include "panic.h"
 #include "ata-target.h"
+#include "dm320.h"
+
+void sleep_ms(int ms)
+{
+    sleep(ms*HZ/1000);
+}
 
 void ide_power_enable(bool on)
 {
+/* Disabled until figured out what's wrong */
 #if 0
-    IO_INTC_EINT1 &= ~INTR_EINT1_EXT2;
+    int old_level = disable_irq_save();
     if(on)
     {
         IO_GIO_BITSET0 = (1 << 14);
@@ -37,8 +44,7 @@ void ide_power_enable(bool on)
     }
     else
         IO_GIO_BITCLR0 = (1 << 14);
-    IO_INTC_EINT1 |= INTR_EINT1_EXT2;
+    restore_irq(old_level);
-    return;
 #else
     (void)on;
 #endif
@@ -55,26 +61,24 @@ inline bool ide_powered()
 
 void ata_reset(void)
 {
-/* Disabled until figured out what's wrong */
+    int old_level = disable_irq_save();
-    IO_INTC_EINT1 &= ~INTR_EINT1_EXT2; /*disable GIO2 interrupt */
     if(!ide_powered())
     {
         ide_power_enable(true);
-        sleep(150);
+        sleep_ms(150);
     }
     else
     {
         IO_GIO_BITSET0 = (1 << 5);
         IO_GIO_BITCLR0 = (1 << 3);
-        sleep(1);
+        sleep_ms(1);
     }
     IO_GIO_BITCLR0 = (1 << 5);
-    sleep(10);
+    sleep_ms(10);
     IO_GIO_BITSET0 = (1 << 3);
     while(!(ATA_COMMAND & STATUS_RDY))
-        sleep(10);
+        sleep_ms(10);
-    IO_INTC_EINT1 |= INTR_EINT1_EXT2; //enable GIO2 interrupt
+    restore_irq(old_level);
-    return;
 }
 
 void ata_enable(bool on)
@@ -88,9 +92,79 @@ bool ata_is_coldstart(void)
     return true;
 }
 
+#if 0 /* Disabled as device crashes; probably due to SDRAM addresses aren't 32-bit aligned */
+#define CS1_START       0x50000000
+#define DEST_ADDR       (ATA_IOBASE-CS1_START)
+static struct wakeup transfer_completion_signal;
+
+void MTC0(void)
+{
+    IO_INTC_IRQ1 = 1 << IRQ_MTC0;
+    wakeup_signal(&transfer_completion_signal);
+}
+
+void copy_read_sectors(unsigned char* buf, int wordcount)
+{
+    bool lasthalfword = false;
+    unsigned short tmp;
+    if(wordcount < 16)
+    {
+        _copy_read_sectors(buf, wordcount);
+        return;
+    }
+    else if((unsigned long)buf % 32) /* Not 32-byte aligned */
+    {
+        unsigned char* bufend = buf + ((unsigned long)buf % 32);
+        if( ((unsigned long)buf % 32) % 2 )
+            lasthalfword = true;
+        wordcount -= ((unsigned long)buf % 32) / 2;
+        do
+        {
+            tmp = ATA_DATA;
+            *buf++ = tmp >> 8;
+            *buf++ = tmp & 0xff;
+        } while (buf < bufend); /* tail loop is faster */
+    }
+    IO_SDRAM_SDDMASEL = 0x0830; /* 32-byte burst mode transfer */
+    IO_EMIF_AHBADDH = ((unsigned)buf >> 16) & ~(1 << 15); /* Set variable address */
+    IO_EMIF_AHBADDL = (unsigned)buf & 0xFFFF;
+    IO_EMIF_DMAMTCSEL = 1; /* Select CS1 */
+    IO_EMIF_MTCADDH = ( (1 << 15) | (DEST_ADDR >> 16) ); /* Set fixed address */
+    IO_EMIF_MTCADDL = DEST_ADDR & 0xFFFF;
+    IO_EMIF_DMASIZE = wordcount*2;
+    IO_EMIF_DMACTL = 3; /* Select MTC->AHB and start transfer */
+    //wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
+    while(IO_EMIF_DMACTL & 1)
+        nop;
+    if(lasthalfword)
+    {
+        *buf += wordcount * 2;
+        tmp = ATA_DATA;
+        *buf++ = tmp >> 8;
+        *buf++ = tmp & 0xff;
+    }
+}
+void copy_write_sectors(const unsigned char* buf, int wordcount)
+{
+    IO_EMIF_DMAMTCSEL = 1; /* Select CS1 */
+    IO_SDRAM_SDDMASEL = 0x0820; /* Temporarily set to standard value */
+    IO_EMIF_AHBADDH = ((int)buf >> 16) & ~(1 << 15); /* Set variable address */
+    IO_EMIF_AHBADDL = (int)buf & 0xFFFF;
+    IO_EMIF_MTCADDH = ( (1 << 15) | (DEST_ADDR >> 16) ); /* Set fixed address */
+    IO_EMIF_MTCADDL = DEST_ADDR & 0xFFFF;
+    IO_EMIF_DMASIZE = wordcount;
+    IO_EMIF_DMACTL = 1; /* Select AHB->MTC and start transfer */
+    wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
+}
+#endif
+
 void ata_device_init(void)
 {
-    IO_INTC_EINT1 |= INTR_EINT1_EXT2;   //enable GIO2 interrupt
+    IO_INTC_EINT1 |= INTR_EINT1_EXT2;   /* enable GIO2 interrupt */
+#if 0
+    IO_INTC_EINT1 |= 1 << IRQ_MTC0;     /* enable MTC interrupt */
+    wakeup_init(&transfer_completion_signal);
+#endif
     //TODO: mimic OF inits...
     return;
 }
@@ -98,8 +172,8 @@ void ata_device_init(void)
 void GIO2(void)
 {
 #ifdef DEBUG
-    //printf("GIO2 interrupt...");
+    logf("GIO2 interrupt...");
 #endif
-    IO_INTC_IRQ1 = INTR_IRQ1_EXT2; //Mask GIO2 interrupt
+    IO_INTC_IRQ1 = INTR_IRQ1_EXT2; /* Mask GIO2 interrupt */
     return;
 }

firmware/target/arm/tms320dm320/creative-zvm/ata-target.h

@@ -20,10 +20,13 @@
 #ifndef ATA_TARGET_H
 #define ATA_TARGET_H
 
-/* Plain C read & write loops */
+/* ASM optimized reading and writing */
-#define PREFER_C_READING
+#define ATA_OPTIMIZED_READING
-#define PREFER_C_WRITING
+#define ATA_OPTIMIZED_WRITING
+void copy_read_sectors(unsigned char* buf, int wordcount);
+void copy_write_sectors(const unsigned char* buf, int wordcount);
 
+/* General purpose memory region #1 */
 #define ATA_IOBASE      0x50FEE000
 #define ATA_DATA        (*((volatile unsigned short*)(ATA_IOBASE)))
 #define ATA_ERROR       (*((volatile unsigned char*)(ATA_IOBASE+0x2)))

firmware/target/arm/tms320dm320/creative-zvm/audio-creativezvm.c

@@ -1,44 +0,0 @@
-/***************************************************************************
- *             __________               __   ___.
- *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
- *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
- *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
- *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
- *                     \/            \/     \/    \/            \/
- * $Id: audio-c200_e200.c 14624 2007-09-06 03:01:41Z lowlight $
- *
- * Copyright (C) 2007 by Michael Sevakis
- *
- * All files in this archive are subject to the GNU General Public License.
- * See the file COPYING in the source tree root for full license agreement.
- *
- * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
- * KIND, either express or implied.
- *
- ****************************************************************************/
-#include "cpu.h"
-#include "kernel.h"
-#include "sound.h"
-
-const struct sound_settings_info audiohw_settings[] = {
-    [SOUND_VOLUME]        = {"dB", 0,  1, -74,   6, -25},
-    [SOUND_BASS]          = {"dB", 1, 15, -60,  90,   0},
-    [SOUND_TREBLE]        = {"dB", 1, 15, -60,  90,   0},
-    [SOUND_BALANCE]       = {"%",  0,  1,-100, 100,   0},
-    [SOUND_CHANNELS]      = {"",   0,  1,   0,   5,   0},
-    [SOUND_STEREO_WIDTH]  = {"%",  0,  5,   0, 250, 100},
-};
-
-
-void audiohw_init(void)
-{
-}
-
-void audiohw_close(void)
-{
-}
-
-void audiohw_mute(bool mute)
-{
-    (void) mute;
-}

firmware/target/arm/tms320dm320/i2c-dm320.c

@@ -26,7 +26,7 @@
 #define I2C_SCS_COND_STOP   0x0002
 #define I2C_SCS_XMIT        0x0004
 
-#define I2C_TX_ACK          (1 << 20)
+#define I2C_TX_ACK          (1 << 8)
 
 static struct mutex i2c_mtx;
 
@@ -42,7 +42,12 @@ static inline void i2c_end(void)
 
 static inline bool i2c_getack(void)
 {
-    return (IO_I2C_RXDATA & 0x100)>>8;
+    return (IO_I2C_RXDATA >> 8) & 1;
+}
+
+static inline void i2c_ack(void)
+{
+    IO_I2C_TXDATA |= I2C_TX_ACK;
 }
 
 #define WAIT_FOR_I2C    if(IO_I2C_SCS & 0x4){ \