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More iPod changes

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7825 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Dave Chapman 2005-11-12 15:29:43 +00:00
parent 3c1f659aeb
commit a3bf2ec61c
4 changed files with 153 additions and 117 deletions
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51
firmware/app.lds
View file

@ -10,6 +10,7 @@ INPUT(crt0.o)
#elif CONFIG_CPU == PP5020 #elif CONFIG_CPU == PP5020
OUTPUT_FORMAT(elf32-littlearm) OUTPUT_FORMAT(elf32-littlearm)
OUTPUT_ARCH(arm) OUTPUT_ARCH(arm)
INPUT(crt0.o)
#else #else
OUTPUT_FORMAT(elf32-sh) OUTPUT_FORMAT(elf32-sh)
INPUT(crt0.o) INPUT(crt0.o)
@ -102,44 +103,6 @@ _audiobufend = 0;
_pluginbuf = 0; _pluginbuf = 0;
}
#elif CONFIG_CPU==PP5020
SECTIONS
{
. = 0x10000000;
.text : {
*(.init.text)
*(.text)
}
__data_start__ = . ;
.data : { *(.data) }
__data_end__ = . ;
__stack_start__ = .;
.stack :
{
*(.stack)
_stackbegin = .;
stackbegin = .;
. += 0x2000;
_stackend = .;
stackend = .;
}
/* The bss section is too large for IRAM - we just move it at the
end of the regular RAM. */
. = 0x11c00000;
__bss_start__ = .;
.bss : {
*(.bss);
__bss_end__ = . ;
}
} }
#else #else
@ -159,6 +122,10 @@ SECTIONS
#define DRAMORIG 0x31000000 + STUBOFFSET #define DRAMORIG 0x31000000 + STUBOFFSET
#define IRAMORIG 0x10000000 #define IRAMORIG 0x10000000
#define IRAMSIZE 0xc000 #define IRAMSIZE 0xc000
#elif CONFIG_CPU==PP5020
#define DRAMORIG 0x10000000 + STUBOFFSET
#define IRAMORIG 0x40000000
#define IRAMSIZE 0xc000
#else #else
#define DRAMORIG 0x09000000 + STUBOFFSET #define DRAMORIG 0x09000000 + STUBOFFSET
#define IRAMORIG 0x0f000000 #define IRAMORIG 0x0f000000
@ -194,6 +161,10 @@ SECTIONS
. = ALIGN(0x200); . = ALIGN(0x200);
*(.init.text) *(.init.text)
*(.text*) *(.text*)
#if CONFIG_CPU==PP5020
*(.glue_7)
*(.glue_7t)
#endif
. = ALIGN(0x4); . = ALIGN(0x4);
} > DRAM } > DRAM
@ -243,7 +214,7 @@ SECTIONS
_iend = .; _iend = .;
} > IRAM } > IRAM
#ifdef CPU_COLDFIRE #if defined(CPU_COLDFIRE) || CONFIG_CPU==PP5020
.stack : .stack :
{ {
*(.stack) *(.stack)
@ -263,7 +234,7 @@ SECTIONS
} > DRAM } > DRAM
#endif #endif
#ifdef CPU_COLDFIRE #if defined(CPU_COLDFIRE) || CONFIG_CPU==PP5020
.bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram): .bss ADDR(.data) + SIZEOF(.data) + SIZEOF(.iram):
#else #else
.bss : .bss :

157
firmware/crt0.S
View file

@ -20,7 +20,7 @@
#include "cpu.h" #include "cpu.h"
#if (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) #if (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020)
.section .init.text .section .init.text,"ax",%progbits
#else #else
.section .init.text,"ax",@progbits .section .init.text,"ax",@progbits
#endif #endif
@ -34,119 +34,126 @@ start:
* Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org> * Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org>
* *
*/ */
.equ PP5002_PROC_ID, 0xc4000000 .equ PP5002_PROC_ID, 0xc4000000
.equ PP5002COP_CTRL, 0xcf004058 .equ PP5002COP_CTRL, 0xcf004058
.equ PP5020_PROC_ID, 0x60000000 .equ PP5020_PROC_ID, 0x60000000
.equ PP5020_COP_CTRL, 0x60007004 .equ PP5020_COP_CTRL, 0x60007004
start: start:
/* get the high part of our execute address */ /* get the high part of our execute address */
ldr r0, =0xff000000 ldr r0, =0xff000000
and r8, pc, r0 @ r8 is used later and r8, pc, r0 @ r8 is used later
#ifdef BOOTLOADER
#if CONFIG_CPU==PP5002 #if CONFIG_CPU==PP5002
mov r0, #PP5002_PROC_ID mov r0, #PP5002_PROC_ID
#else #else
mov r0, #PP5020_PROC_ID mov r0, #PP5020_PROC_ID
#endif #endif
ldr r0, [r0] ldr r0, [r0]
and r0, r0, #0xff and r0, r0, #0xff
cmp r0, #0x55 cmp r0, #0x55
beq 1f beq 1f
/* put us (co-processor) to sleep */ /* put us (co-processor) to sleep */
#if CONFIG_CPU==PP5002 #if CONFIG_CPU==PP5002
ldr r4, =PP5002_COP_CTRL ldr r4, =PP5002_COP_CTRL
mov r3, #0xca mov r3, #0xca
#else #else
ldr r4, =PP5020_COP_CTRL ldr r4, =PP5020_COP_CTRL
mov r3, #0x80000000 mov r3, #0x80000000
#endif #endif
str r3, [r4] str r3, [r4]
ldr pc, =cop_wake_start
ldr pc, =cop_wake_start
cop_wake_start: cop_wake_start:
/* jump the COP to startup */ /* jump the COP to startup */
ldr r0, =startup_loc ldr r0, =startup_loc
ldr pc, [r0] ldr pc, [r0]
1: 1:
/* setup some stack */ /* setup some stack */
ldr sp, = _stackbegin ldr sp, = _stackbegin
/* get the high part of our execute address */ /* get the high part of our execute address */
ldr r2, =0xffffff00 ldr r2, =0xffffff00
and r4, pc, r2 and r4, pc, r2
/* Copy bootloader to safe area - 0x40000000 */ /* Copy bootloader to safe area - 0x40000000 */
mov r5, #0x40000000 mov r5, #0x40000000
ldr r6, = _dataend ldr r6, = _dataend
sub r0, r6, r5 /* length of loader */ sub r0, r6, r5 /* length of loader */
add r0, r4, r0 /* r0 points to start of loader */ add r0, r4, r0 /* r0 points to start of loader */
1: 1:
cmp r5, r6 cmp r5, r6
ldrcc r2, [r4], #4 ldrcc r2, [r4], #4
strcc r2, [r5], #4 strcc r2, [r5], #4
bcc 1b bcc 1b
ldr pc, =start_loc /* jump to the relocated start_loc: */ ldr pc, =start_loc /* jump to the relocated start_loc: */
start_loc: start_loc:
/* Initialise bss section to zero */ /* Initialise bss section to zero */
ldr r3, =_bssstart ldr r3, =_bssstart
ldr r1, =_bssend ldr r1, =_bssend
mov r2, #0x0 mov r2, #0x0
1: 1:
cmp r3, r1 cmp r3, r1
strcc r2, [r3], #4 strcc r2, [r3], #4
bcc 1b bcc 1b
/* execute the loader - this will load an image to 0x10000000 */ /* execute the loader - this will load an image to 0x10000000 */
bl main bl main
/* save the startup address for the COP */ /* save the startup address for the COP */
ldr r1, =startup_loc ldr r1, =startup_loc
str r0, [r1] str r0, [r1]
#if CONFIG_CPU==PP5002 #if CONFIG_CPU==PP5002
/* make sure COP is sleeping */ /* make sure COP is sleeping */
ldr r4, =0xcf004050 ldr r4, =0xcf004050
1: 1:
ldr r3, [r4] ldr r3, [r4]
ands r3, r3, #0x4000 ands r3, r3, #0x4000
beq 1b beq 1b
/* wake up COP */ /* wake up COP */
ldr r4, =PP5002_COP_CTRL ldr r4, =PP5002_COP_CTRL
mov r3, #0xce mov r3, #0xce
strh r3, [r4] strh r3, [r4]
#else #else
/* make sure COP is sleeping */ /* make sure COP is sleeping */
ldr r4, =PP5020_COP_CTRL ldr r4, =PP5020_COP_CTRL
1: 1:
ldr r3, [r4] ldr r3, [r4]
ands r3, r3, #0x80000000 ands r3, r3, #0x80000000
beq 1b beq 1b
/* wake up COP */ /* wake up COP */
@ ldr r4, =PP5020_COP_CTRL @ ldr r4, =PP5020_COP_CTRL
mov r3, #0x0 mov r3, #0x0
str r3, [r4] str r3, [r4]
#endif #endif
/* jump to start location */ /* jump to start location */
mov pc, r0 mov pc, r0
startup_loc: startup_loc:
.word 0x0 .word 0x0
.align 8 /* starts at 0x100 */ .align 8 /* starts at 0x100 */
.global boot_table .global boot_table
boot_table: boot_table:
/* here comes the boot table, don't move its offset */ /* here comes the boot table, don't move its offset */
.space 400 .space 400
#else
/* TODO: Implement startup code */
#endif /* BOOTLOADER (iPod) */
#elif CONFIG_CPU == TCC730 #elif CONFIG_CPU == TCC730
/* Platform: Gmini 120/SP */ /* Platform: Gmini 120/SP */

55
firmware/pcm_playback.c
View file

@ -329,4 +329,57 @@ void pcm_init(void)
dma_stop(); dma_stop();
} }
#endif /* HAVE_UDA1380 */ #elif defined(HAVE_WM8975)
/* TODO: Implement for iPod - we should probably move the UDA1380 and
WM8975 specific code into separate files.
For now, just implement some dummy functions.
*/
void pcm_init(void)
{
}
void pcm_set_frequency(unsigned int frequency)
{
(void)frequency;
}
void pcm_play_data(void (*get_more)(unsigned char** start, long* size))
{
(void)get_more;
}
void pcm_play_stop(void)
{
}
void pcm_play_pause(bool play)
{
(void)play;
}
bool pcm_is_paused(void)
{
return false;
}
bool pcm_is_playing(void)
{
return false;
}
void pcm_calculate_peaks(int *left, int *right)
{
(void)left;
(void)right;
}
long pcm_get_bytes_waiting(void)
{
return 0;
}
#endif

5
firmware/system.c
View file

@ -1116,6 +1116,11 @@ void system_reboot(void) {
} }
int system_memory_guard(int newmode)
{
(void)newmode;
return 0;
}
#endif /* CONFIG_CPU */ #endif /* CONFIG_CPU */