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Gigabeat F/X: Correct the yielding in the ATA. Dump the unneeded DMA transfer complete interrupt in there too. Clean it out.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13293 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2007-04-30 12:54:05 +00:00
parent 0987a6be89
commit a05bb26233
2 changed files with 15 additions and 20 deletions
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14
firmware/target/arm/s3c2440/gigabeat-fx/ata-meg-fx.c
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@ -20,6 +20,7 @@
#include "cpu.h" #include "cpu.h"
#include <stdbool.h> #include <stdbool.h>
#include "kernel.h" #include "kernel.h"
#include "thread.h"
#include "system.h" #include "system.h"
#include "power.h" #include "power.h"
#include "panic.h" #include "panic.h"
@ -117,27 +118,20 @@ void copy_read_sectors(unsigned char* buf, int wordcount)
DIDST0 += 0x30000000; DIDST0 += 0x30000000;
DIDSTC0 = 0; DIDSTC0 = 0;
/* DACK/DREQ Sync to AHB, Int on Transfer complete, Whole service, No reload, 16-bit transfers */ /* DACK/DREQ Sync to AHB, Whole service, No reload, 16-bit transfers */
DCON0 = ((1 << 30) | (1<< 29) | (1<<27) | (1<<22) | (1<<20)) | wordcount; DCON0 = ((1 << 30) | (1<<27) | (1<<22) | (1<<20)) | wordcount;
/* Activate the channel */ /* Activate the channel */
DMASKTRIG0 = 0x2; DMASKTRIG0 = 0x2;
invalidate_dcache_range((void *)buf, wordcount*2); invalidate_dcache_range((void *)buf, wordcount*2);
INTMSK &= ~(1<<17); /* unmask the interrupt */
SRCPND = (1<<17); /* clear any pending interrupts */
/* Start DMA */ /* Start DMA */
DMASKTRIG0 |= 0x1; DMASKTRIG0 |= 0x1;
/* Wait for transfer to complete */ /* Wait for transfer to complete */
while((DSTAT0 & 0x000fffff)) while((DSTAT0 & 0x000fffff))
yield(); priority_yield();
/* Dump cache for the buffer */ /* Dump cache for the buffer */
} }
#endif #endif
void dma0(void)
{
}

21
firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
View file

@ -6,13 +6,16 @@
#include "lcd.h" #include "lcd.h"
#include <stdio.h> #include <stdio.h>
const int TIMER4_MASK = (1 << 14); enum
const int LCD_MASK = (1 << 16); {
const int DMA0_MASK = (1 << 17); TIMER4_MASK = (1 << 14),
const int DMA1_MASK = (1 << 18); LCD_MASK = (1 << 16),
const int DMA2_MASK = (1 << 19); DMA0_MASK = (1 << 17),
const int DMA3_MASK = (1 << 20); DMA1_MASK = (1 << 18),
const int ALARM_MASK = (1 << 30); DMA2_MASK = (1 << 19),
DMA3_MASK = (1 << 20),
ALARM_MASK = (1 << 30),
};
int system_memory_guard(int newmode) int system_memory_guard(int newmode)
{ {
@ -21,7 +24,7 @@ int system_memory_guard(int newmode)
} }
extern void timer4(void); extern void timer4(void);
extern void dma0(void); extern void dma0(void); /* free */
extern void dma1(void); extern void dma1(void);
extern void dma3(void); extern void dma3(void);
@ -35,8 +38,6 @@ void irq(void)
/* Timer 4 */ /* Timer 4 */
if ((intpending & TIMER4_MASK) != 0) if ((intpending & TIMER4_MASK) != 0)
timer4(); timer4();
else if ((intpending & DMA0_MASK) != 0)
dma0();
else else
{ {
/* unexpected interrupt */ /* unexpected interrupt */