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Convert the TCC77x ADC driver to use interrupts - based on the technique used in the SH ADC driver.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17311 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Dave Chapman 2008-05-03 07:49:39 +00:00
parent 2124a9fad0
commit 9c1ab1f057
3 changed files with 69 additions and 23 deletions

View file

@ -82,6 +82,7 @@
/* IRQ Controller */ /* IRQ Controller */
#define TIMER0_IRQ_MASK (1<<6) #define TIMER0_IRQ_MASK (1<<6)
#define ADC_IRQ_MASK (1<<16)
#define IEN (*(volatile unsigned long *)0x80000100) #define IEN (*(volatile unsigned long *)0x80000100)
#define CREQ (*(volatile unsigned long *)0x80000104) #define CREQ (*(volatile unsigned long *)0x80000104)

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@ -24,48 +24,93 @@
#include "string.h" #include "string.h"
#include "adc.h" #include "adc.h"
/* /**************************************************************************
TODO: We probably want to do this on the timer interrupt once we get ** The A/D conversion is done every tick, in three steps:
interrupts going - see the sh-adc.c implementation for an example which **
looks like it should work well with the TCC77x. ** 1) On the tick interrupt, the conversion of channels 0-3 is started, and
*/ ** the A/D interrupt is enabled.
**
** 2) After the conversion is done, an interrupt
** is generated at level 1, which is the same level as the tick interrupt
** itself. This interrupt will be pending until the tick interrupt is
** finished.
** When the A/D interrupt is finally served, it will read the results
** from the first conversion and start the conversion of channels 4-7.
**
** 3) When the conversion of channels 4-7 is finished, the interrupt is
** triggered again, and the results are read. This time, no new
** conversion is started, it will be done in the next tick interrupt.
**
** Thus, each channel will be updated HZ times per second.
**
*************************************************************************/
static int channel_group;
static unsigned short adcdata[8]; static unsigned short adcdata[8];
static void adc_do_read(void) /* Tick task */
static void adc_tick(void)
{ {
/* Start a conversion of channels 0-3. This will trigger an interrupt,
and the interrupt handler will take care of channels 4-7. */
int i; int i;
uint32_t adc_status;
PCLKCFG6 |= (1<<15); /* Enable ADC clock */ PCLKCFG6 |= (1<<15); /* Enable ADC clock */
channel_group = 0;
/* Start converting the first 4 channels */ /* Start converting the first 4 channels */
for (i = 0; i < 4; i++) for (i = 0; i < 4; i++)
ADCCON = i; ADCCON = i;
/* Wait for data to become stable */ }
while ((ADCDATA & 0x1) == 0);
/* Now read the values back */ /* IRQ handler */
for (i=0;i < 4; i++) { void ADC(void)
{
int num;
int i;
uint32_t adc_status;
do
{
adc_status = ADCSTATUS; adc_status = ADCSTATUS;
adcdata[(adc_status >> 16) & 0x7] = adc_status & 0x3ff; num = (adc_status>>24) & 7;
} if (num) adcdata[(adc_status >> 16) & 0x7] = adc_status & 0x3ff;
} while (num);
PCLKCFG6 &= ~(1<<15); /* Disable ADC clock */
if (channel_group == 0)
{
/* Start conversion of channels 4-7 */
for (i = 4; i < 8; i++)
ADCCON = i;
channel_group = 1;
}
else
{
PCLKCFG6 &= ~(1<<15); /* Disable ADC clock */
}
} }
unsigned short adc_read(int channel) unsigned short adc_read(int channel)
{ {
adc_do_read();
return adcdata[channel]; return adcdata[channel];
} }
void adc_init(void) void adc_init(void)
{ {
int i;
ADCCON = (1<<4); /* Leave standby mode */ ADCCON = (1<<4); /* Leave standby mode */
ADCCFG |= 0x00000003; /* Single-mode, auto power-down */
/* IRQ enable, auto power-down, single-mode */
ADCCFG |= (1<<3) | (1<<1) | (1<<0);
/* Unmask ADC IRQ */
IEN |= ADC_IRQ_MASK;
tick_add_task(adc_tick);
sleep(2); /* Ensure adc_data[] contains data before returning */
} }

View file

@ -21,7 +21,9 @@
#include "system.h" #include "system.h"
#include "panic.h" #include "panic.h"
/* Externally defined interrupt handlers */
extern void TIMER(void); extern void TIMER(void);
extern void ADC(void);
void irq(void) void irq(void)
{ {
@ -29,13 +31,11 @@ void irq(void)
CREQ = irq; /* Clears the corresponding IRQ status */ CREQ = irq; /* Clears the corresponding IRQ status */
if (irq & TIMER0_IRQ_MASK) if (irq & TIMER0_IRQ_MASK)
{
TIMER(); TIMER();
} else if (irq & ADC_IRQ_MASK)
ADC();
else else
{
panicf("Unhandled IRQ 0x%08X", irq); panicf("Unhandled IRQ 0x%08X", irq);
}
} }
void fiq_handler(void) void fiq_handler(void)