forked from len0rd/rockbox
SPC Codec: Simplify configuration and assume nothing need be disabled.
Most SoCs are these days are fast enough for realtime BRR, gaussian interpolation and echo processing. Change-Id: I180ce8ad45242c67b5e573a406b9522098a3f12b
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ed24e62029
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9b43f14165
1 changed files with 22 additions and 34 deletions
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@ -41,54 +41,42 @@
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#define ARM_ARCH 0
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#define ARM_ARCH 0
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#endif
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#endif
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#define SPC_DUAL_CORE 1
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#if NUM_CORES == 1
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#if !defined(SPC_DUAL_CORE) || NUM_CORES == 1
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#undef SPC_DUAL_CORE
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#define SPC_DUAL_CORE 0
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#define SPC_DUAL_CORE 0
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#else
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#define SPC_DUAL_CORE 1
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#endif
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#endif
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/* Only some targets are fast enough for gaussian and realtime BRR decode */
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/* Only some targets are too slow for gaussian and realtime BRR decode */
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#if CONFIG_CPU == S3C2440 || CONFIG_CPU == IMX31L || \
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#if defined(CPU_COLDFIRE)
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CONFIG_CPU == AS3525 || CONFIG_CPU == AS3525v2 || \
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defined(CPU_S5L870X) || \
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(CONFIG_PLATFORM & PLATFORM_HOSTED) || MEMORYSIZE <= 2
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/* Don't cache BRR waves */
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#define SPC_BRRCACHE 0
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/* Allow gaussian interpolation */
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#define SPC_NOINTERP 0
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/* Allow echo processing */
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#define SPC_NOECHO 0
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#elif defined(CPU_COLDFIRE)
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/* Cache BRR waves */
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/* Cache BRR waves */
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#define SPC_BRRCACHE 1
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#define SPC_BRRCACHE 1
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/* Disable gaussian interpolation */
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/* Disable gaussian interpolation */
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#define SPC_NOINTERP 1
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#define SPC_NOINTERP 1
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#elif defined (CPU_PP)
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/* Allow echo processing */
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#define SPC_NOECHO 0
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#elif defined (CPU_PP) && SPC_DUAL_CORE
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/* Cache BRR waves */
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/* Cache BRR waves */
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#define SPC_BRRCACHE 1
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#define SPC_BRRCACHE 1
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/* Disable gaussian interpolation */
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/* Disable gaussian interpolation */
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#define SPC_NOINTERP 1
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#define SPC_NOINTERP 1
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#if !SPC_DUAL_CORE
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/* Allow echo processing */
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#define SPC_NOECHO 0
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#else
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/* Cache BRR waves */
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#define SPC_BRRCACHE 1
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/* Disable gaussian interpolation */
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#define SPC_NOINTERP 1
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/* Disable echo processing */
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/* Disable echo processing */
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#define SPC_NOECHO 1
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#define SPC_NOECHO 1
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#endif
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#endif
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#endif /* CPU_* */
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/** Turn on, by default, all the good stuff **/
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#ifndef SPC_BRRCACHE
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/* Don't cache BRR waves */
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#define SPC_BRRCACHE 0
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#endif
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#ifndef SPC_NOINTERP
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/* Allow gaussian interpolation */
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#define SPC_NOINTERP 0
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#endif
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#ifndef SPC_NOECHO
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/* Allow echo processing */
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#define SPC_NOECHO 0
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#endif
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#if (CONFIG_CPU == MCF5250)
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#if (CONFIG_CPU == MCF5250)
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#define IBSS_ATTR_SPC IBSS_ATTR
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#define IBSS_ATTR_SPC IBSS_ATTR
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