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Remove CORELOCK_SWAP (unused since r16981)

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26664 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré 2010-06-07 16:23:21 +00:00
parent 4eea33e27d
commit 9730755fc7
2 changed files with 0 additions and 49 deletions
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5
firmware/export/config.h
View file

@ -793,7 +793,6 @@ Lyre prototype 1 */
#define CORELOCK_NONE 0
#define SW_CORELOCK 1 /* Mutual exclusion provided by a software algorithm
and not a special semaphore instruction */
#define CORELOCK_SWAP 2 /* A swap (exchange) instruction */
#if defined(CPU_PP)
#define IDLE_STACK_SIZE 0x80
@ -818,11 +817,7 @@ Lyre prototype 1 */
#define IF_COP_VOID(...) __VA_ARGS__
#define IF_COP_CORE(core) core
#ifdef CPU_PP
#define CONFIG_CORELOCK SW_CORELOCK /* SWP(B) is broken */
#else
#define CONFIG_CORELOCK CORELOCK_SWAP
#endif
#endif /* !defined(BOOTLOADER) && CONFIG_CPU != PP5002 */

44
firmware/export/thread.h
View file

@ -175,21 +175,6 @@ void corelock_init(struct corelock *cl);
void corelock_lock(struct corelock *cl);
int corelock_try_lock(struct corelock *cl);
void corelock_unlock(struct corelock *cl);
#elif CONFIG_CORELOCK == CORELOCK_SWAP
/* Use native atomic swap/exchange instruction */
struct corelock
{
volatile unsigned char locked;
} __attribute__((packed));
#define corelock_init(cl) \
({ (cl)->locked = 0; })
#define corelock_lock(cl) \
({ while (test_and_set(&(cl)->locked, 1)); })
#define corelock_try_lock(cl) \
({ test_and_set(&(cl)->locked, 1) ? 0 : 1; })
#define corelock_unlock(cl) \
({ (cl)->locked = 0; })
#else
/* No atomic corelock op needed or just none defined */
#define corelock_init(cl)
@ -384,35 +369,6 @@ struct core_entry
*(a) = (v); \
corelock_unlock(cl); \
o; })
#elif CONFIG_CORELOCK == CORELOCK_SWAP
/* atomic */
#define test_and_set(a, v, ...) \
xchg8((a), (v))
#define xchg8(a, v, ...) \
({ uint32_t o; \
asm volatile( \
"swpb %0, %1, [%2]" \
: "=&r"(o) \
: "r"(v), \
"r"((uint8_t*)(a))); \
o; })
/* atomic */
#define xchg32(a, v, ...) \
({ uint32_t o; \
asm volatile( \
"swp %0, %1, [%2]" \
: "=&r"(o) \
: "r"((uint32_t)(v)), \
"r"((uint32_t*)(a))); \
o; })
/* atomic */
#define xchgptr(a, v, ...) \
({ typeof (*(a)) o; \
asm volatile( \
"swp %0, %1, [%2]" \
: "=&r"(o) \
: "r"(v), "r"(a)); \
o; })
#endif /* locking selection */
#elif defined (CPU_COLDFIRE)
/* atomic */