From 94c06c7e95943bdf4ae57c6250f9352661ac4d56 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C3=ABl=20Carr=C3=A9?= Date: Thu, 6 Nov 2008 14:34:37 +0000 Subject: [PATCH] AS3525: implement tick_start() with TIMER2 git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19027 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/as3525.h | 8 ++++++ firmware/target/arm/as3525/kernel-as3525.c | 31 +++++++++++++++++++++- 2 files changed, 38 insertions(+), 1 deletion(-) diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h index 8d81997b94..245f4ae963 100644 --- a/firmware/export/as3525.h +++ b/firmware/export/as3525.h @@ -283,6 +283,14 @@ interface */ #define TIMER1_MIS (*(volatile unsigned long*)(TIMER_BASE + 0x14)) /* 1 bit width */ #define TIMER1_BGLOAD (*(volatile unsigned long*)(TIMER_BASE + 0x18)) /* 32-bit width */ +#define TIMER2_LOAD (*(volatile unsigned long*)(TIMER_BASE + 0x20)) /* 32-bit width */ +#define TIMER2_VALUE (*(volatile unsigned long*)(TIMER_BASE + 0x24)) /* 32 bit width */ +#define TIMER2_CONTROL (*(volatile unsigned long*)(TIMER_BASE + 0x28)) /* 8 bit width */ +#define TIMER2_INTCLR (*(volatile unsigned long*)(TIMER_BASE + 0x2C)) /* clears ir by write access */ +#define TIMER2_RIS (*(volatile unsigned long*)(TIMER_BASE + 0x30)) /* 1 bit width */ +#define TIMER2_MIS (*(volatile unsigned long*)(TIMER_BASE + 0x34)) /* 1 bit width */ +#define TIMER2_BGLOAD (*(volatile unsigned long*)(TIMER_BASE + 0x38)) /* 32-bit width */ + /** * Counter/Timer control register bits **/ diff --git a/firmware/target/arm/as3525/kernel-as3525.c b/firmware/target/arm/as3525/kernel-as3525.c index c0f404efbd..08d6128bb7 100644 --- a/firmware/target/arm/as3525/kernel-as3525.c +++ b/firmware/target/arm/as3525/kernel-as3525.c @@ -21,8 +21,37 @@ #include "config.h" #include "system.h" #include "kernel.h" +#include "panic.h" + +void INT_TIMER2(void) +{ + call_tick_tasks(); /* Run through the list of tick tasks */ + + TIMER2_INTCLR = 0; /* clear interrupt */ +} void tick_start(unsigned int interval_in_ms) { - (void)interval_in_ms; + int phi = 0; /* prescaler bits */ + int prescale = 1; + int cycles = 64000 * interval_in_ms; /* pclk is clocked at 64MHz */ + + while(cycles > 0x10000) + { + phi++; + prescale <<= 4; + cycles >>= 4; + } + + if(prescale > 256) + panicf("%s : interval too big", __func__); + + CGU_PERI |= CGU_TIMER2_CLOCK_ENABLE; /* enable peripheral */ + VIC_INT_ENABLE = INTERRUPT_TIMER2; /* enable interrupt */ + + TIMER2_LOAD = TIMER2_BGLOAD = cycles; /* timer period */ + + /* /!\ bit 4 (reserved) must not be modified + * periodic mode, interrupt enabled, 16 bits counter */ + TIMER2_CONTROL = (TIMER2_CONTROL & (1<<4)) | 0xe0 | (phi<<2); }