forked from len0rd/rockbox
Sansa Connect: change bootloader linker file
This change ensures that Sansa Connect bootloader.bin will fit in its flash partition. Fix _flash_sizem calculation, division was not working properly because FLASHSIZE included subtraction and defined value was not in parenthesis. Prior to this change _flash_sizem was 0x00800000, now it is correctly set to 4 in case of Sansa Connect and 8 in case of other TMS320DM320 players. This significantly improves boot time as cache is now enabled only for real flash memory region. Change-Id: If3e50a3075c840dcb69dfafe5bba608a0acd2bf8
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9327885d14
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94b23da3c4
2 changed files with 14 additions and 7 deletions
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@ -34,6 +34,8 @@ STARTUP(target/arm/tms320dm320/crt0.o)
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#define IRAMORIG 0x00000000
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#define IRAMORIG 0x00000000
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#define IRAMSIZE 0x4000
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#define IRAMSIZE 0x4000
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#define FLASHORIG 0x00100000
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#ifdef SANSA_CONNECT
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#ifdef SANSA_CONNECT
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/* Offset in flash from beginning, we don't want overwrite OF bootloader
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/* Offset in flash from beginning, we don't want overwrite OF bootloader
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due to recovery mode and more importantly - hardware block protection.
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due to recovery mode and more importantly - hardware block protection.
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@ -41,15 +43,18 @@ STARTUP(target/arm/tms320dm320/crt0.o)
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In .srr file header add any valid memory address from following
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In .srr file header add any valid memory address from following
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<0x1000000; 0x1300180) u (0x131EAF4; 0x1420000) u (0x1440000; 0x5000000>
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<0x1000000; 0x1300180) u (0x131EAF4; 0x1420000) u (0x1440000; 0x5000000>
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ensuring that complete bootloader fits in.
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ensuring that complete bootloader fits in.
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Entry point in .srr file should be 0x120010. */
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Entry point in .srr file should be equal to _loadaddress. */
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#define FLASHOFFSET 0x20010
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#define FLASHSIZE 0x00400000
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#define FLASHMEMORIG 0x00120010
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/* Kernel partition is 2 M, srr header is 16 bytes, sig is 2048 bytes */
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#define FLASHMEMSIZE 0x001FF7F0
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#else
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#else
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#define FLASHOFFSET 0
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/* On targets other than Sansa Connect use whole flash for bootloader */
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#define FLASHSIZE 0x00800000
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#define FLASHMEMORIG FLASHORIG
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#define FLASHMEMSIZE FLASHSIZE
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#endif
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#endif
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#define FLASHORIG 0x00100000
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#define FLASHSIZE 0x00800000-FLASHOFFSET
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PRO_STACK_SIZE = 0x2000;
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PRO_STACK_SIZE = 0x2000;
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IRQ_STACK_SIZE = 0x400;
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IRQ_STACK_SIZE = 0x400;
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FIQ_STACK_SIZE = 0x400;
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FIQ_STACK_SIZE = 0x400;
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@ -61,7 +66,7 @@ MEMORY
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{
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{
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
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IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
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IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
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FLASH : ORIGIN = FLASHORIG+FLASHOFFSET, LENGTH = FLASHSIZE
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FLASH : ORIGIN = FLASHMEMORIG, LENGTH = FLASHMEMSIZE
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}
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}
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SECTIONS
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SECTIONS
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@ -121,9 +121,11 @@ _start:
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ldr r2, =_vectorsend
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ldr r2, =_vectorsend
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bl _copy_section
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bl _copy_section
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#if !defined(SANSA_CONNECT)
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/* Add some delay time to make sure JTAG can be accessed cleanly */
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/* Add some delay time to make sure JTAG can be accessed cleanly */
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mov r0, #0x100000
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mov r0, #0x100000
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bl _delay_cycles
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bl _delay_cycles
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#endif
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#if defined(BOOTLOADER)
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#if defined(BOOTLOADER)
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/* Copy the DRAM */
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/* Copy the DRAM */
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