forked from len0rd/rockbox
iRiver: Major PCM DMA code cleanup, added pcm_init() and pcm_play_pause()
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@6234 a1c6a512-1295-4272-9138-f99709370657
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1e77c70b32
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2 changed files with 81 additions and 56 deletions
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@ -19,10 +19,12 @@
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#ifndef PCM_PLAYBACK_H
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#define PCM_PLAYBACK_H
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void pcm_init(void);
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void pcm_set_frequency(unsigned int frequency);
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void pcm_play_data(const unsigned char* start, int size,
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void (*get_more)(unsigned char** start, long* size));
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void pcm_play_stop(void);
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void pcm_play_pause(bool play);
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bool pcm_is_playing(void);
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void pcm_set_volume(int volume);
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@ -42,57 +42,37 @@
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#include <string.h>
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static bool pcm_playing;
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static int pcm_freq = 0x6; // 44.1 in default
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static bool pcm_paused;
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static int pcm_freq = 0x6; /* 44.1 is default */
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/* Set up the DMA transfer that kicks in when the audio FIFO gets empty */
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static void dma_start(const void *addr_r, long size)
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static void dma_start(const void *addr, long size)
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{
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pcm_playing = 1;
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int i;
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pcm_playing = true;
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int align;
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align = 4;
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addr = (void *)((unsigned long)addr & ~3); /* Align data */
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size &= ~3; /* Size must be multiple of 4 */
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void* addr = (void*)((((unsigned int)addr_r) >> 2) << 2); // always align data, never pass unaligned data
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size = (size >> 2) << 2; // size shoudl also be always multiple of 4
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BUSMASTER_CTRL = 0x81; /* PARK[1,0]=10 + BCR24BIT */
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/* Reset the audio FIFO */
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IIS2CONFIG = 0x800;
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/* Set up DMA transfer */
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DIVR0 = 54; /* DMA0 is mapped into vector 54 in system.c */
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SAR0 = ((unsigned long)addr) + align*4; /* Source address */
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SAR0 = ((unsigned long)addr); /* Source address */
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DAR0 = (unsigned long)&PDOR3; /* Destination address */
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BCR0 = size-(align*4); /* Bytes to transfer */
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DMAROUTE = (DMAROUTE & 0xffffff00) | DMA0_REQ_AUDIO_1;
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DMACONFIG = 1; /* Enable DMA0Req => set DMAROUTE |= DMA0_REQ_AUDIO_1 */
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BCR0 = size; /* Bytes to transfer */
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/* Start transfer when requested */
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DCR0 = DMA_INT | DMA_EEXT | DMA_CS | DMA_SINC;
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/* Enable interrupt at level 7, priority 0 */
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ICR4 = (ICR4 & 0xffff00ff) | 0x00001c00;
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IMR &= ~(1<<14); /* bit 14 is DMA0 */
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IIS2CONFIG = (pcm_freq << 12) | 0x300; /* CLOCKSEL for right frequency + data source = PDOR3 */
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for(i = 0; i < align; i++)
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PDOR3 = ((unsigned int*)(addr))[i]; /* These are needed to generate FIFO empty request to DMA.. */
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/* Enable the FIFO and force one write to it */
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IIS2CONFIG = (pcm_freq << 12) | 0x300;
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DCR0 = DMA_INT | DMA_EEXT | DMA_CS | DMA_SINC | DMA_START;
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}
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/* Stops the DMA transfer and interrupt */
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static void dma_stop(void)
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{
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pcm_playing = 0;
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DCR0 = 0;
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/* DMAROUTE &= 0xffffff00;
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DMACONFIG = 0;*/
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pcm_playing = false;
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/* Reset the FIFO */
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IIS2CONFIG = 0x800;
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/* Disable DMA0 interrupt */
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IMR |= (1<<14);
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ICR4 &= 0xffff00ff;
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}
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@ -126,6 +106,7 @@ void pcm_set_frequency(unsigned int frequency)
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break;
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default:
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pcm_freq = 0x6;
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break;
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}
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}
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@ -145,6 +126,23 @@ void pcm_play_stop(void)
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dma_stop();
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}
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void pcm_play_pause(bool play)
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{
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if(pcm_paused && play)
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{
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/* Enable the FIFO and force one write to it */
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IIS2CONFIG = (pcm_freq << 12) | 0x300;
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DCR0 |= DMA_START;
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pcm_paused = false;
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}
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else if(!pcm_paused && !play)
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{
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IIS2CONFIG = 0x800;
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pcm_paused = true;
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}
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}
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bool pcm_is_playing(void)
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{
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return pcm_playing;
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@ -161,11 +159,13 @@ void DMA0(void)
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DSR0 = 1; /* Clear interrupt */
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if(res == 0x41)
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/* Stop on error */
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if(res & 0x70)
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{
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dma_stop();
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}
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else
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{
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if (callback_for_more)
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{
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callback_for_more(&start, &size);
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@ -181,6 +181,29 @@ void DMA0(void)
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/* Finished playing */
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dma_stop();
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}
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}
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IPR |= (1<<14); /* Clear pending interrupt request */
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}
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void pcm_init(void)
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{
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pcm_playing = false;
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pcm_paused = false;
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uda1380_init();
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BUSMASTER_CTRL = 0x81; /* PARK[1,0]=10 + BCR24BIT */
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DIVR0 = 54; /* DMA0 is mapped into vector 54 in system.c */
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DMAROUTE = (DMAROUTE & 0xffffff00) | DMA0_REQ_AUDIO_1;
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DMACONFIG = 1; /* DMA0Req = PDOR3 */
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/* Reset the audio FIFO */
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IIS2CONFIG = 0x800;
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/* Enable interrupt at level 7, priority 0 */
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ICR4 = (ICR4 & 0xffff00ff) | 0x00001c00;
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IMR &= ~(1<<14); /* bit 14 is DMA0 */
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pcm_set_frequency(44100);
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}
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