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Fix TABs and get rid of HAVE_BUTTON_HOLD

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18737 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Maurus Cuelenaere 2008-10-07 20:23:56 +00:00
parent 6b84f60046
commit 9003c116ca
7 changed files with 15 additions and 26 deletions
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1
firmware/export/config-creativezv.h
View file

@ -73,7 +73,6 @@
#define HAVE_LCD_ENABLE
#define CONFIG_KEYPAD CREATIVEZV_PAD
#define HAVE_BUTTON_HOLD
#define HAVE_HEADPHONE_DETECTION
//#define HAVE_TOUCHPAD

1
firmware/export/config-creativezvm.h
View file

@ -73,7 +73,6 @@
#define HAVE_LCD_ENABLE
#define CONFIG_KEYPAD CREATIVEZVM_PAD
#define HAVE_BUTTON_HOLD
#define HAVE_HEADPHONE_DETECTION
//#define HAVE_TOUCHPAD

1
firmware/export/config-creativezvm60gb.h
View file

@ -73,7 +73,6 @@
#define HAVE_LCD_ENABLE
#define CONFIG_KEYPAD CREATIVEZVM_PAD
#define HAVE_BUTTON_HOLD
#define HAVE_HEADPHONE_DETECTION
//#define HAVE_TOUCHPAD

1
firmware/export/config-ondavx747.h
View file

@ -67,7 +67,6 @@
#define HAVE_LCD_ENABLE
#define CONFIG_KEYPAD ONDAVX747_PAD
#define HAVE_BUTTON_HOLD
#define HAVE_TOUCHSCREEN
#define HAVE_BUTTON_DATA

1
firmware/export/config-ondavx767.h
View file

@ -67,7 +67,6 @@
//#define HAVE_LCD_ENABLE
#define CONFIG_KEYPAD ONDAVX767_PAD
#define HAVE_BUTTON_HOLD
/* Define this if you do software codec */
#define CONFIG_CODEC SWCODEC

25
firmware/export/jz4740.h
View file

@ -2354,31 +2354,32 @@
/* Power register bit masks */
#define USB_POWER_SUSPENDM 0x01
#define USB_POWER_SUSPENDM 0x01
#define USB_POWER_RESUME 0x04
#define USB_POWER_HSMODE 0x10
#define USB_POWER_HSENAB 0x20
#define USB_POWER_SOFTCONN 0x40
#define USB_POWER_SOFTCONN 0x40
/* Interrupt register bit masks */
#define USB_INTR_SUSPEND 0x01
#define USB_INTR_RESUME 0x02
#define USB_INTR_RESET 0x04
#define USB_INTR_RESUME 0x02
#define USB_INTR_RESET 0x04
#define USB_INTR_EP0 0x0001
#define USB_INTR_INEP1 0x0002
#define USB_INTR_INEP2 0x0004
#define USB_INTR_OUTEP1 0x0002
#define USB_INTR_INEP1 0x0002
#define USB_INTR_INEP2 0x0004
#define USB_INTR_OUTEP1 0x0002
#define USB_INTR_OUTEP2 0x0004
/* CSR0 bit masks */
#define USB_CSR0_OUTPKTRDY 0x01
#define USB_CSR0_INPKTRDY 0x02
#define USB_CSR0_INPKTRDY 0x02
#define USB_CSR0_SENTSTALL 0x04
#define USB_CSR0_DATAEND 0x08
#define USB_CSR0_SETUPEND 0x10
#define USB_CSR0_DATAEND 0x08
#define USB_CSR0_SETUPEND 0x10
#define USB_CSR0_SENDSTALL 0x20
#define USB_CSR0_SVDOUTPKTRDY 0x40
#define USB_CSR0_SVDSETUPEND 0x80
#define USB_CSR0_SVDOUTPKTRDY 0x40
#define USB_CSR0_SVDSETUPEND 0x80
/* Endpoint CSR register bits */
#define USB_INCSRH_AUTOSET 0x80

11
firmware/thread.c
View file

@ -989,7 +989,6 @@ static inline void core_sleep(void)
void start_thread(void); /* Provide C access to ASM label */
static void __attribute__((used)) _start_thread(void)
{
/* $t1 = context */
asm volatile (
"start_thread: \n"
@ -1004,7 +1003,6 @@ static void __attribute__((used)) _start_thread(void)
".set reorder \n"
);
thread_exit();
}
/* Place context pointer in $s0 slot, function pointer in $s1 slot, and
@ -1084,10 +1082,9 @@ static inline void load_context(const void* addr)
static inline void core_sleep(void)
{
#if CONFIG_CPU == JZ4732
REG_CPM_LCR &= ~CPM_LCR_LPM_MASK;
REG_CPM_LCR |= CPM_LCR_LPM_SLEEP;
__cpm_idle_mode();
#endif
asm volatile(".set mips32r2 \n"
asm volatile(".set mips32r2 \n"
"mfc0 $8, $12 \n" /* mfc $t0, $12 */
"move $9, $8 \n" /* move $t1, $t0 */
"la $10, 0x8000000 \n" /* la $t2, 0x8000000 */
@ -1098,10 +1095,6 @@ static inline void core_sleep(void)
".set mips0 \n"
::: "t0", "t1", "t2"
);
#if CONFIG_CPU == JZ4732
REG_CPM_LCR &= ~CPM_LCR_LPM_MASK;
REG_CPM_LCR |= CPM_LCR_LPM_IDLE;
#endif
}