forked from len0rd/rockbox
jz4760: Explicitly disable UARTs at startup
(Bootloader uses UART1, and leaves it running when it hands it off to us) Change-Id: Icde1d713574582f18e9f91b5c95f3917fe324b74
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parent
06e9abc428
commit
8dadce5c4c
3 changed files with 24 additions and 2 deletions
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@ -138,6 +138,8 @@ bool dbg_ports(void)
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return false;
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return false;
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}
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}
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extern uint32_t irqstackend,irqstackbegin;
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bool dbg_hw_info(void)
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bool dbg_hw_info(void)
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{
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{
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int btn = 0;
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int btn = 0;
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@ -151,6 +153,12 @@ bool dbg_hw_info(void)
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{
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{
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lcd_clear_display();
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lcd_clear_display();
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line = 0;
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line = 0;
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uint32_t *ptr = &irqstackbegin;
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for ( ; ptr < &irqstackend && *ptr == 0xDEADBEEF; ptr++) {}
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lcd_putsf(0, line++, "IRQ stack max: %d", (uint32_t)&irqstackend - (uint32_t)ptr);
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display_clocks();
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display_clocks();
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display_enabled_clocks();
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display_enabled_clocks();
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#ifdef HAVE_TOUCHSCREEN
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#ifdef HAVE_TOUCHSCREEN
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@ -169,8 +177,7 @@ bool dbg_hw_info(void)
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return true;
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return true;
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}
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}
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#define CFG_UART_BASE UART1_BASE /* Base of the UART channel */
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#ifdef WITH_SERIAL
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void serial_putc (const char c)
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void serial_putc (const char c)
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{
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{
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volatile u8 *uart_lsr = (volatile u8 *)(CFG_UART_BASE + OFF_LSR);
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volatile u8 *uart_lsr = (volatile u8 *)(CFG_UART_BASE + OFF_LSR);
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@ -271,3 +278,4 @@ void serial_dump_data(unsigned char* data, int len)
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serial_putc( '\n' );
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serial_putc( '\n' );
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}
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}
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#endif
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@ -29,6 +29,9 @@
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#include "power.h"
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#include "power.h"
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//#define USE_HW_UDELAY // This is BROKEN.
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//#define USE_HW_UDELAY // This is BROKEN.
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#ifdef BOOTLOADER
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#define WITH_SERIAL
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#endif
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static int irq;
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static int irq;
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static void UIRQ(void)
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static void UIRQ(void)
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@ -535,6 +538,7 @@ void pll1_disable(void)
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REG_CPM_CPPCR1 &= ~CPPCR1_PLL1EN;
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REG_CPM_CPPCR1 &= ~CPPCR1_PLL1EN;
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}
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}
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#ifdef WITH_SERIAL
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static void serial_setbrg(void)
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static void serial_setbrg(void)
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{
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{
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volatile u8 *uart_lcr = (volatile u8 *)(CFG_UART_BASE + OFF_LCR);
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volatile u8 *uart_lcr = (volatile u8 *)(CFG_UART_BASE + OFF_LCR);
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@ -589,6 +593,7 @@ int serial_preinit(void)
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return 0;
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return 0;
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}
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}
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#endif
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#ifndef HAVE_ADJUSTABLE_CPU_FREQ
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#ifndef HAVE_ADJUSTABLE_CPU_FREQ
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#define cpu_frequency CPU_FREQ
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#define cpu_frequency CPU_FREQ
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@ -698,7 +703,14 @@ void ICODE_ATTR system_main(void)
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pll0_init(CPUFREQ_DEFAULT); // PLL0 drives everything but audio
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pll0_init(CPUFREQ_DEFAULT); // PLL0 drives everything but audio
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pll1_disable(); // Leave PLL1 disabled until audio needs it
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pll1_disable(); // Leave PLL1 disabled until audio needs it
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/* Make sure UARTs are off */
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__cpm_stop_uart0();
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__cpm_stop_uart1();
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__cpm_stop_uart2();
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#ifdef WITH_SERIAL
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serial_preinit();
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serial_preinit();
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#endif
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usb_preinit();
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usb_preinit();
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dma_preinit();
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dma_preinit();
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@ -32,6 +32,8 @@
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#define CACHE_LINE_SIZE 32
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#define CACHE_LINE_SIZE 32
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#include "mmu-mips.h"
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#include "mmu-mips.h"
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#define CFG_UART_BASE UART1_BASE /* Base of the UART channel */
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/* no optimized byteswap functions implemented for mips, yet */
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/* no optimized byteswap functions implemented for mips, yet */
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#define NEED_GENERIC_BYTESWAPS
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#define NEED_GENERIC_BYTESWAPS
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