devs/foxbox
1
0
Fork 0
forked from len0rd/rockbox
Code Pull requests Activity

ATJ hwstub: Add cache coherency

Browse source 
All the hard work was done by pamaury. I simply added proper
defines.

Change-Id: Ib374eea7cd20f35518ad8a68d771c57c54ae01ca
This commit is contained in:
Marcin Bukat 2017-09-15 21:38:57 +02:00
parent c6d5cd74a8
commit 8b744571c0
1 changed files with 7 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

7
utils/hwstub/stub/atj213x/target-config.h
View file

@ -3,6 +3,13 @@
#define IRAM_SIZE 0x18000
#define DRAM_ORIG 0x80000000 /* KSEG1 cached unmapped */
#define DRAM_SIZE 0x800000
#define DCACHE_SIZE 0x4000 /* 16 kB */
#define DCACHE_LINE_SIZE 0x10 /* 16 B */
#define ICACHE_SIZE 0x4000 /* 16 kB */
#define ICACHE_LINE_SIZE 0x10 /* 61 B */
/* we need to flush caches before executing */
#define CONFIG_FLUSH_CACHES
#define CPU_MIPS
/* something provides define