devs/foxbox
1
0
Fork 0
forked from len0rd/rockbox
Code Pull requests Activity

Use CACHEALIGN_BITS to calculate CACHEALIGN_SIZE instead of directly setting it.

Browse source 
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28682 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Andree Buschmann 2010-11-27 10:06:26 +00:00
parent 54b2d72a4e
commit 8972744ea9
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
firmware/export/imx31l.h
View file

@ -38,7 +38,7 @@
#define FRAME ((void *)(FRAME_PHYS_ADDR+0x100000-CSD0_BASE_ADDR))
#define CACHEALIGN_BITS 5
#define CACHEALIGN_SIZE 32
#define CACHEALIGN_SIZE (1u << CACHEALIGN_BITS) /* needed by *.link */
#define NOCACHE_BASE CSD0_BASE_ADDR
/* USBOTG */