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as3525v2: crashless cpufreq switching

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delays after modifying the registers seems not to be needed
moving RAM operation (cpu_frequency variable) before modifying the
register also seems to help

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25754 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Rafaël Carré 2010-04-29 03:15:18 +00:00
parent 2a180e8039
commit 893180d47d
1 changed files with 3 additions and 8 deletions
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11
firmware/target/arm/as3525/system-as3525.c
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@ -453,34 +453,29 @@ void set_cpu_frequency(long frequency)
void set_cpu_frequency(long frequency) void set_cpu_frequency(long frequency)
{ {
int oldstatus = disable_irq_save(); int oldstatus = disable_irq_save();
int delay;
/* We only have 2 settings */
cpu_frequency = (frequency == CPUFREQ_MAX) ? frequency : CPUFREQ_NORMAL;
if(frequency == CPUFREQ_MAX) if(frequency == CPUFREQ_MAX)
{ {
/* Change PCLK while FCLK is low, so it doesn't go too high */ /* Change PCLK while FCLK is low, so it doesn't go too high */
CGU_PERI = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0 << 2); CGU_PERI = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0 << 2);
delay = 40; while(delay--) asm("nop");
CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) |
(AS3525_FCLK_PREDIV << 2) | (AS3525_FCLK_PREDIV << 2) |
AS3525_FCLK_SEL); AS3525_FCLK_SEL);
} }
else else
{ {
frequency = CPUFREQ_NORMAL; /* We only have 2 settings */
CGU_PROC = ((AS3525_FCLK_POSTDIV_UNBOOSTED << 4) | CGU_PROC = ((AS3525_FCLK_POSTDIV_UNBOOSTED << 4) |
(AS3525_FCLK_PREDIV << 2) | (AS3525_FCLK_PREDIV << 2) |
AS3525_FCLK_SEL); AS3525_FCLK_SEL);
/* Change PCLK after FCLK is low, so it doesn't go too high */ /* Change PCLK after FCLK is low, so it doesn't go too high */
CGU_PERI = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0_UNBOOSTED << 2); CGU_PERI = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0_UNBOOSTED << 2);
delay = 40; while(delay--) asm("nop");
} }
cpu_frequency = frequency;
restore_irq(oldstatus); restore_irq(oldstatus);
} }
#endif #endif