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lv24020lp tuner: On PP targets (c200/e200), use the atomic GPIO bitwise macros for the interface since it shares GPIOH with the clickwheel interrupt.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27038 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2010-06-22 04:00:34 +00:00
parent 94c23e167c
commit 831707d991
2 changed files with 37 additions and 29 deletions
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46
firmware/drivers/tuner/lv24020lp.c
View file

@ -67,24 +67,31 @@ static int fd_log = -1;
/** tuner register defines **/ /** tuner register defines **/
#if defined(SANSA_E200) || defined(SANSA_C200) #if defined(SANSA_E200) || defined(SANSA_C200)
#define TUNER_GPIO_OUTPUT_EN GPIOH_OUTPUT_EN #define TUNER_GPIO_INPUT_VAL GPIOH_INPUT_VAL
#define TUNER_GPIO_OUTPUT_VAL GPIOH_OUTPUT_VAL #define TUNER_GPIO_OUTPUT_EN_SET(mask) GPIO_SET_BITWISE(GPIOH_OUTPUT_EN, mask)
#define TUNER_GPIO_INPUT_VAL GPIOH_INPUT_VAL #define TUNER_GPIO_OUTPUT_EN_CLEAR(mask) GPIO_CLEAR_BITWISE(GPIOH_OUTPUT_EN, mask)
#define TUNER_GPIO_OUTPUT_VAL_SET(mask) GPIO_SET_BITWISE(GPIOH_OUTPUT_VAL, mask)
#define TUNER_GPIO_OUTPUT_VAL_CLEAR(mask) GPIO_CLEAR_BITWISE(GPIOH_OUTPUT_VAL, mask)
#define FM_NRW_PIN 3 #define FM_NRW_PIN 3
#define FM_CLOCK_PIN 4 #define FM_CLOCK_PIN 4
#define FM_DATA_PIN 5 #define FM_DATA_PIN 5
#elif defined(IAUDIO_7) #elif defined(IAUDIO_7)
#define TUNER_GPIO_OUTPUT_EN GPIOA_DIR #define TUNER_GPIO_INPUT_VAL GPIOA
#define TUNER_GPIO_OUTPUT_VAL GPIOA #define TUNER_GPIO_OUTPUT_EN_SET(mask) (GPIOA_DIR |= (mask))
#define TUNER_GPIO_INPUT_VAL GPIOA #define TUNER_GPIO_OUTPUT_EN_CLEAR(mask) (GPIOA_DIR &= ~(mask))
#define TUNER_GPIO_OUTPUT_VAL_SET(mask) (GPIOA |= (mask))
#define TUNER_GPIO_OUTPUT_VAL_CLEAR(mask) (GPIOA &= ~(mask))
#define FM_CLOCK_PIN 5 #define FM_CLOCK_PIN 5
#define FM_DATA_PIN 6 #define FM_DATA_PIN 6
#define FM_NRW_PIN 7 #define FM_NRW_PIN 7
#elif defined(COWON_D2) #elif defined(COWON_D2)
#define TUNER_GPIO_OUTPUT_EN GPIOC_DIR #define TUNER_GPIO_INPUT_VAL GPIOC
#define TUNER_GPIO_OUTPUT_VAL GPIOC #define TUNER_GPIO_OUTPUT_EN_SET(mask) (GPIOC_DIR |= (mask))
#define TUNER_GPIO_INPUT_VAL GPIOC #define TUNER_GPIO_OUTPUT_EN_CLEAR(mask) (GPIOC_DIR &= ~(mask))
#define TUNER_GPIO_OUTPUT_VAL_SET(mask) (GPIOC |= (mask))
#define TUNER_GPIO_OUTPUT_VAL_CLEAR(mask) (GPIOC &= ~(mask))
#define FM_NRW_PIN 31 #define FM_NRW_PIN 31
#define FM_CLOCK_PIN 29 #define FM_CLOCK_PIN 29
#define FM_DATA_PIN 30 #define FM_DATA_PIN 30
@ -291,16 +298,17 @@ static void lv24020lp_send_byte(unsigned int byte)
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
{ {
TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN); TUNER_GPIO_OUTPUT_VAL_CLEAR(1 << FM_CLOCK_PIN);
if (byte & 1) if (byte & 1)
TUNER_GPIO_OUTPUT_VAL |= (1 << FM_DATA_PIN); TUNER_GPIO_OUTPUT_VAL_SET(1 << FM_DATA_PIN);
else else
TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_DATA_PIN); TUNER_GPIO_OUTPUT_VAL_CLEAR(1 << FM_DATA_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
TUNER_GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN); TUNER_GPIO_OUTPUT_VAL_SET(1 << FM_CLOCK_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
byte >>= 1; byte >>= 1;
@ -311,8 +319,8 @@ static void lv24020lp_send_byte(unsigned int byte)
static void lv24020lp_end_write(void) static void lv24020lp_end_write(void)
{ {
/* switch back to read mode */ /* switch back to read mode */
TUNER_GPIO_OUTPUT_EN &= ~(1 << FM_DATA_PIN); TUNER_GPIO_OUTPUT_EN_CLEAR(1 << FM_DATA_PIN);
TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_NRW_PIN); TUNER_GPIO_OUTPUT_VAL_CLEAR(1 << FM_NRW_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
} }
@ -326,8 +334,8 @@ static unsigned int lv24020lp_begin_write(unsigned int address)
for (;;) for (;;)
{ {
/* Prepare 3-wire bus pins for write cycle */ /* Prepare 3-wire bus pins for write cycle */
TUNER_GPIO_OUTPUT_VAL |= (1 << FM_NRW_PIN); TUNER_GPIO_OUTPUT_VAL_SET(1 << FM_NRW_PIN);
TUNER_GPIO_OUTPUT_EN |= (1 << FM_DATA_PIN); TUNER_GPIO_OUTPUT_EN_SET(1 << FM_DATA_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
/* current block == register block? */ /* current block == register block? */
@ -418,13 +426,13 @@ static unsigned int lv24020lp_read(unsigned int address)
toread = 0; toread = 0;
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
{ {
TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN); TUNER_GPIO_OUTPUT_VAL_CLEAR(1 << FM_CLOCK_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
if (TUNER_GPIO_INPUT_VAL & (1 << FM_DATA_PIN)) if (TUNER_GPIO_INPUT_VAL & (1 << FM_DATA_PIN))
toread |= (1 << i); toread |= (1 << i);
TUNER_GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN); TUNER_GPIO_OUTPUT_VAL_SET(1 << FM_CLOCK_PIN);
udelay(FM_CLK_DELAY); udelay(FM_CLK_DELAY);
} }

20
firmware/target/arm/sandisk/power-c200_e200.c
View file

@ -107,18 +107,18 @@ bool tuner_power(bool status)
in host read mode: */ in host read mode: */
/* 1. Set direction of the DATA-line to input-mode. */ /* 1. Set direction of the DATA-line to input-mode. */
GPIOH_OUTPUT_EN &= ~(1 << 5); GPIO_CLEAR_BITWISE(GPIOH_OUTPUT_EN, 1 << 5);
GPIOH_ENABLE |= (1 << 5); GPIO_SET_BITWISE(GPIOH_ENABLE, 1 << 5);
/* 2. Drive NR_W low */ /* 2. Drive NR_W low */
GPIOH_OUTPUT_VAL &= ~(1 << 3); GPIO_CLEAR_BITWISE(GPIOH_OUTPUT_VAL, 1 << 3);
GPIOH_OUTPUT_EN |= (1 << 3); GPIO_SET_BITWISE(GPIOH_OUTPUT_EN, 1 << 3);
GPIOH_ENABLE |= (1 << 3); GPIO_SET_BITWISE(GPIOH_ENABLE, 1 << 3);
/* 3. Drive CLOCK high */ /* 3. Drive CLOCK high */
GPIOH_OUTPUT_VAL |= (1 << 4); GPIO_SET_BITWISE(GPIOH_OUTPUT_VAL, 1 << 4);
GPIOH_OUTPUT_EN |= (1 << 4); GPIO_SET_BITWISE(GPIOH_OUTPUT_EN, 1 << 4);
GPIOH_ENABLE |= (1 << 4); GPIO_SET_BITWISE(GPIOH_ENABLE, 1 << 4);
lv24020lp_power(true); lv24020lp_power(true);
} }
@ -127,8 +127,8 @@ bool tuner_power(bool status)
lv24020lp_power(false); lv24020lp_power(false);
/* set all as inputs */ /* set all as inputs */
GPIOH_OUTPUT_EN &= ~((1 << 5) | (1 << 3) | (1 << 4)); GPIO_CLEAR_BITWISE(GPIOH_OUTPUT_EN, (1 << 5) | (1 << 3) | (1 << 4));
GPIOH_ENABLE &= ~((1 << 3) | (1 << 4)); GPIO_CLEAR_BITWISE(GPIOH_ENABLE, (1 << 3) | (1 << 4));
/* turn off mystery amplification device */ /* turn off mystery amplification device */
#if defined (SANSA_E200) #if defined (SANSA_E200)